The main technical achievements of SPRINTER, within Period 2 can be summarized as follows:
Obj.1: InP-EML (Fig.1) and InP-PD arrays for the O-band multilane optical transceiver have been developed, exhibiting output powers of up to 20 mW and responsivities above 0.5 A/W. In addition, GaAs-based VCSEL arrays with flip-chip compatible pads (Fig.2) with output power above 3 mW and modulation BW over 30 GHz and flip-chip compatible InP PD arrays (Fig.3) (0.55 A/W, 30 GHz), operating at 1060 nm, were successfully developed. Finally, novel flip-chip PolyBoard interposers hosting VCSELs and PDs have been demonstrated for the first time, achieving propagation losses below 0.4 dB/cm.
Obj.2: A major milestone was reached with the development of a single-gain PZT-based ECL laser prototype, exhibiting comparable performance to heater-based counterparts. Meanwhile, LNOI chips with various modulator designs were developed, demonstrating promising results, confirming their potential for high-speed modulation and efficient integration with hybrid photonic platforms.
Obj. 3 & 4: Progress continues toward these objectives, with key components being under development.
Obj. 5: The targeted energy-efficient SiGe BiCMOS circuits have been developed and tested using precursor assemblies showing very good or even state-of-the-art performance. For example, the driver-VCSEL assembly operates up to 60 Gb/s over 5 km standard single-mode fiber while consuming around 1 pJ/bit. Furthermore, the driver-EML assembly operates up to 80 Gb/s NRZ and 112 Gb/s PAM-4 per channel, confirming that the driver can handle high photocurrent and a wide bias voltage range ( Fig. 4). Finally, the burst-mode TIA has been demonstrated together with a new burst-mode CDR up to 30 Gb/s with locking times < 10 ns, exceeding the SPRINTER requirements.
Obj. 6: Significant progress was made on the SDN controller and agent integration for time-sensitive networking (TSN). Wireless network testing for TSN synchronization was completed, and both Device and Network-side TSN Translators were implemented. Software was developed to interface with TSN NICs via exposed APIs, enabling control over traffic and network resources while a Centralized Network Controller (CNC) was designed and extended to manage all endpoints, successfully applying user-defined policies.
Obj.7: A key milestone of the project has been reached with the successful assembly and packaging of the EML-based PSM-4 200Gbps optical transceiver of SPRINTER (Module-1a Tx, Rx)- see Figure 5.
Obj.8: Preparatory work for final demonstration activities progressed significantly. The design of testbeds and final demo setups was completed, focusing on showcasing SPRINTER’s applicability in robotic accuracy and visual inspection scenarios.
Obj. 9: A comprehensive market analysis was conducted, along with a manufacturability plan emphasizing scalable, cost-efficient production strategies. The exploitation plan was refined to explore suitable business models and integration paths for industrial deployment. Dissemination and communication efforts expanded considerably, with over 2,100 website visitors and more than 25,200 social media impressions. The consortium partners actively participated in several high-profile events and 17 scientific articles published.
