Periodic Reporting for period 1 - RESPITE (RECONFIGURABLE SUPERCONDUTING AND PHOTONIC TECHNOLOGIES OF THE FUTURE)
Reporting period: 2023-03-01 to 2024-02-29
Neuromorphic computing, inspired by the brain's structure and function, is an emerging field with applications in machine learning, remote sensing, automotive, biomedicine, and defense. Despite recent successes surpassing supercomputers in certain tasks, emulating human brain performance in vision and recognition remains challenging due to hardware limitations. Metal-oxide-semiconductor (CMOS) technology and multi-level memristors struggle with scaling, causing optical losses and high power consumption. The RESPITE project aims to advance neuromorphic computing by combining superconducting nanowire single-photon detectors (SNSPDs) for low-loss, single-photon-level vision, and superconducting Joule switches (SJSs) and cryogenic phase-change materials (PCMs) for artificial neural networks (ANNs). Leveraging superconducting elements, the project targets unprecedented sensitivity and minimal energy dissipation. RESPITE develops a thermoelectric simulation platform, single-photon imagers, low-dissipation neurons, programmable synaptic weights, and a simulation framework for ANNs. Proof-of-concept devices will scale into technology demonstrators showcasing RESPITE's capabilities.
(i) **Thermoelectric Simulation Platform:** A Python-based simulation package has been developed to understand the complex dynamics of superconducting components, focusing on electric-thermal coupling and phenomena like current backflow. This tool integrates thermoelectrical models with SPICE for circuit simulation, enabling successful validation tests and ongoing adaptations to incorporate various superconducting elements efficiently.
(ii) **SNSPD Imager:** An imager based on SNSPD square arrays is being developed to mimic a retina for vision tasks in RESPITE. This includes optimized signal routing and biasing of pixels, targeting an operation wavelength of 1550 nm. Initial testing with a 6x6 SNSPD array showed promising performance, with efforts underway to scale up the array size and design larger SNSPD arrays and PCBs for future project phases.
(iii) **SJSs and On-Chip Superconducting Amplifiers:** Superconducting nanowires are explored for low-dissipation computing, demonstrating logic gate operations with improved designs to mitigate current backflow. A new design using thermal unilateral coupling has been developed, achieving fast logic operations with minimal energy dissipation. Efforts focus on integrating SJSs into small-scale ANNs to act as neurons and tunable synaptic weights.
(iv) **Novel Cryo-PCMs and Optical Programming:** PCM cells will serve as programmable synaptic weights in RESPITE's ANNs, optimized for superconducting elements operating at cryogenic temperatures. Extensive research identified promising cryo-PCMs and characterized their thin film growth and thermoelectric properties. Optical programming of PCM cells using waveguide-based techniques is being evaluated, with ongoing efforts to develop a scalable Wavelength Division Multiplexing (WDM) scheme for efficient programming.
(v) **Benchmarking and Modeling ANN:** RESPITE's ANNs are developed in three stages, with efforts to optimize hardware overhead and mimic hardware-specific constraints using Spiking Neural Network (SNN) models. A thermoelectrical PySpice model of superconducting components is under development for accurate representation. Research focuses on electrical reservoir computing with SJSs, aiming to correct distorted data streams through innovative circuit modeling. Ongoing efforts address challenges like the two-regime behavior observed in simulation results, aiming to enhance the performance of the reservoir network.
(ii) **SNSPD Imager:** An imager based on SNSPD square arrays is being developed to mimic a retina for vision tasks in RESPITE. This includes optimized signal routing and biasing of pixels, targeting an operation wavelength of 1550 nm. Initial testing with a 6x6 SNSPD array showed promising performance, with efforts underway to scale up the array size and design larger SNSPD arrays and PCBs for future project phases.
(iii) **SJSs and On-Chip Superconducting Amplifiers:** Superconducting nanowires are explored for low-dissipation computing, demonstrating logic gate operations with improved designs to mitigate current backflow. A new design using thermal unilateral coupling has been developed, achieving fast logic operations with minimal energy dissipation. Efforts focus on integrating SJSs into small-scale ANNs to act as neurons and tunable synaptic weights.
(iv) **Novel Cryo-PCMs and Optical Programming:** PCM cells will serve as programmable synaptic weights in RESPITE's ANNs, optimized for superconducting elements operating at cryogenic temperatures. Extensive research identified promising cryo-PCMs and characterized their thin film growth and thermoelectric properties. Optical programming of PCM cells using waveguide-based techniques is being evaluated, with ongoing efforts to develop a scalable Wavelength Division Multiplexing (WDM) scheme for efficient programming.
(v) **Benchmarking and Modeling ANN:** RESPITE's ANNs are developed in three stages, with efforts to optimize hardware overhead and mimic hardware-specific constraints using Spiking Neural Network (SNN) models. A thermoelectrical PySpice model of superconducting components is under development for accurate representation. Research focuses on electrical reservoir computing with SJSs, aiming to correct distorted data streams through innovative circuit modeling. Ongoing efforts address challenges like the two-regime behavior observed in simulation results, aiming to enhance the performance of the reservoir network.
1. Cryo-phase-change memory – phase-change memory technology is a mature technology, particularly for binary memory applications, that has led to commercial products. Its use for in-memory and neuromorphic computing, i.e. to act as weights/synapses is well developed in a laboratory setting. However, extending its operation to cryogenic temperatures as planned in the present project is completely novel, and the development of cryogenic a new phase-change memory material and devices is identified as a potentially exploitable outcome of the project. So far, the theoretical considerations are promising and the fabrication of the new phase change material is underway. Furthermore, following an extensive literature review, we have found no indication of competing work. That said, the exploitation potential as well as the impact of this development highly depends on the actual performance of phase change memory devices based on the new material platform. Once measurements indicate promising cryo-phase changes in memory properties, we believe that there would be ample room for filing patent(s) and for subsequent exploitation.
2. Innovative superconducting nanostructures with integrated joule heaters were implemented and tested. The performance outmatches state-of-the-art devices to the best of our knowledge achieving 2 ns switching speed and ~500 attojoule switching power. In addition, and for the first time, we have used our new superconducting joule switches (SJS) to create full binary logic gates such as NOT, AND, OR, NAND, and NOR with power consumptions in the femto-joule regiemes. This latter achievement paves the way for implementation of arbitrary SJS logics with unprecedented performance and, unlike competing technologies such as RSFQ (rapid single flux quantum), straightforward scalability. We are in the process of exploring the potential of our technology for patenting through the IP department and valorization center in TU Delft.
2. Innovative superconducting nanostructures with integrated joule heaters were implemented and tested. The performance outmatches state-of-the-art devices to the best of our knowledge achieving 2 ns switching speed and ~500 attojoule switching power. In addition, and for the first time, we have used our new superconducting joule switches (SJS) to create full binary logic gates such as NOT, AND, OR, NAND, and NOR with power consumptions in the femto-joule regiemes. This latter achievement paves the way for implementation of arbitrary SJS logics with unprecedented performance and, unlike competing technologies such as RSFQ (rapid single flux quantum), straightforward scalability. We are in the process of exploring the potential of our technology for patenting through the IP department and valorization center in TU Delft.