Periodic Reporting for period 1 - ISOLDE (High Performance, Safe, Secure, Open-Source Leveraged RISC-V Domain-Specific Ecosystems)
Reporting period: 2023-05-01 to 2024-04-30
ISOLDE with its holistic approach involving all players along the value chain focuses on enhancing the European RISC-V eco-system with industrial-grade open-source IP, aiming at maturing 2 superscalar high-performance RISC-V multicores (CVA-6 and Noel-V) towards first applications including safety and security critical systems, chip-level and system-level HW components, compilers and the full SW stack. Further, ISOLDE will follow and contribute to specifications from suitable industrial bodies and to Europe’s long-term RISC-V ecosystem strategy. This way, ISOLDE will have delivered a major contribution to the unification and focus of the full-fledged – industry-supported – ecosystem for RISC-V open-source architecture, especially in the area of embedded high-performance computing, and thus to the creation of a breakthrough design capacity across the EU microelectronics industry to the benefit of key European application domains such as automotive, IoT, smart home and space. The broad, industrial guided consortium comprises 37 partners from Austria, Czechia, France, Germany, Italy, Romania, Spain, Sweden and Switzerland.
The project started officially on 1st May 2023. In May, the project coordinator, the work packages leaders, and the country-coordinators performed detailed preparatory planning activities so that the project can start operationally in June 2023. The project's kick-off meeting was held from 5th until 7th of July in Munich (Germany).
WP1 (Requirements and Specifications) is supporting WP2, WP3, WP4, WP5 by providing requirements covering activities in the design and verification process of RISC-V processors, demonstrators and IPs. A total of 33 beneficiaries are involved in the work package. The work package started as planned with M01 and is progressing up to M15 in RP2. The submission of D1.4 (consolidated set of requirements and specifications on architecture, HW and SW modules and IPs) will mark the end of WP1.
WP2 (Open-source Foundation Cores) plays a central technical role within the ISOLDE project and provides foundational RISC-V building blocks. The content of this Work Package will improve the current landscape of RISC-V multi-core support and enhance the existing building blocks (processor pipelines, caches, NoCs) with security and safety features. On Work Package Level a monthly meeting series has been established to ensure a close collaboration between the four tasks. Deliverable D2.1 (Initial report on foundational IP cores) is submitted and next deliverable D2.2 (Intermediate report on foundational IP cores) is scheduled for M18.
WP3 (Accelerators and Extensions) aims to encourage the development of open-source accelerators and extensions while ensuring their compatibility with closed-source IP, helping to widen the RISC-V ecosystem. During the first year of ISOLDE, WP3 partners focused on the design of hardware modules and extensions and development of a monitoring infrastructure to expose the relevant figures of merit of these designs. On Work Package Level a monthly meeting series has been established to ensure a close collaboration between all six tasks. Deliverable D3.1 (Initial Architecture Definition) is submitted. For RP2 the next two deliverables D3.2(Safety & Security modules prototype implementation) and D3.3 (Accelerators prototype implementation) are planned for M24 (end of P2).
For WP4 (System Software, Development Tools and Automation) the overarching objective is to provide the software components required to exploit the hardware blocks, developed in WP2 and WP3 and to be used in the project demonstrators in WP5. All partners have now started their technical activities, with some delays of the Romanian partners due to the delay in financing from their national funding agency. Also, some delays were caused by not fully working instantiation of tools and synchronization issues. Mitigation steps have been taken for all topics to speed up in P2.
WP5 (Use cases and demonstrators) has started to implement the FPGA solutions that support demonstrators for the four use cases (Space, Automotive, Smart home, Cellular IoT). Furthermore, testing, benchmarking and validating of the FPGA solutions are central tasks, as well as the integration of the demonstrators. The main technical risk that the demonstrator architecture may not fit in a single FPGA / IPs cannot be synthesized on chosen FPGA is identified and countermeasures are taken. The main achieved results are FPGA board selection, definitions of demonstrators (submitted in D5.1) and in selected cases, initial experiments with available FPGA boards and/or virtualization environment.
For WP6 (Open-source Strategy, Business Models, Exploitation and Dissemination) all tasks have started the activities. Major results have already been obtained in Tasks 6.1 and 6.2. Preparatory work has started on exploitation in Task 6.3 which will be worked out in more detail in P2 and P3. Deliverable D6.1 and D6.2 are submitted. D6.3 (Intermediate Report on Dissemination Activities) is scheduled for M18. Many partners have contributed to ISOLDE dissemination activities. Closer cooperation with TRISTAN has been started and will be extended. Further steps (e.g. joint repository) are agreed.
WP7 (Project Coordination) has established the Project Management structure and the according deliverables D7.1 and 7.2 (Project Management Handbook, Data Management Plan) as well as the Intermediate periodic report P1 (D7.3) are submitted. Project management is in regular communication with the work packages and further develops processes and communication as required.
WP1 (Requirements and Specifications) is supporting WP2, WP3, WP4, WP5 by providing requirements covering activities in the design and verification process of RISC-V processors, demonstrators and IPs. A total of 33 beneficiaries are involved in the work package. The work package started as planned with M01 and is progressing up to M15 in RP2. The submission of D1.4 (consolidated set of requirements and specifications on architecture, HW and SW modules and IPs) will mark the end of WP1.
WP2 (Open-source Foundation Cores) plays a central technical role within the ISOLDE project and provides foundational RISC-V building blocks. The content of this Work Package will improve the current landscape of RISC-V multi-core support and enhance the existing building blocks (processor pipelines, caches, NoCs) with security and safety features. On Work Package Level a monthly meeting series has been established to ensure a close collaboration between the four tasks. Deliverable D2.1 (Initial report on foundational IP cores) is submitted and next deliverable D2.2 (Intermediate report on foundational IP cores) is scheduled for M18.
WP3 (Accelerators and Extensions) aims to encourage the development of open-source accelerators and extensions while ensuring their compatibility with closed-source IP, helping to widen the RISC-V ecosystem. During the first year of ISOLDE, WP3 partners focused on the design of hardware modules and extensions and development of a monitoring infrastructure to expose the relevant figures of merit of these designs. On Work Package Level a monthly meeting series has been established to ensure a close collaboration between all six tasks. Deliverable D3.1 (Initial Architecture Definition) is submitted. For RP2 the next two deliverables D3.2(Safety & Security modules prototype implementation) and D3.3 (Accelerators prototype implementation) are planned for M24 (end of P2).
For WP4 (System Software, Development Tools and Automation) the overarching objective is to provide the software components required to exploit the hardware blocks, developed in WP2 and WP3 and to be used in the project demonstrators in WP5. All partners have now started their technical activities, with some delays of the Romanian partners due to the delay in financing from their national funding agency. Also, some delays were caused by not fully working instantiation of tools and synchronization issues. Mitigation steps have been taken for all topics to speed up in P2.
WP5 (Use cases and demonstrators) has started to implement the FPGA solutions that support demonstrators for the four use cases (Space, Automotive, Smart home, Cellular IoT). Furthermore, testing, benchmarking and validating of the FPGA solutions are central tasks, as well as the integration of the demonstrators. The main technical risk that the demonstrator architecture may not fit in a single FPGA / IPs cannot be synthesized on chosen FPGA is identified and countermeasures are taken. The main achieved results are FPGA board selection, definitions of demonstrators (submitted in D5.1) and in selected cases, initial experiments with available FPGA boards and/or virtualization environment.
For WP6 (Open-source Strategy, Business Models, Exploitation and Dissemination) all tasks have started the activities. Major results have already been obtained in Tasks 6.1 and 6.2. Preparatory work has started on exploitation in Task 6.3 which will be worked out in more detail in P2 and P3. Deliverable D6.1 and D6.2 are submitted. D6.3 (Intermediate Report on Dissemination Activities) is scheduled for M18. Many partners have contributed to ISOLDE dissemination activities. Closer cooperation with TRISTAN has been started and will be extended. Further steps (e.g. joint repository) are agreed.
WP7 (Project Coordination) has established the Project Management structure and the according deliverables D7.1 and 7.2 (Project Management Handbook, Data Management Plan) as well as the Intermediate periodic report P1 (D7.3) are submitted. Project management is in regular communication with the work packages and further develops processes and communication as required.
The defined goals of the EU Digital Autonomy Initiative form the framework for the objectives and developments of the ISOLDE project. Developments that go beyond the state of the art can be expected in the next two periods. It may already be possible to report details and further results in the next Intermediate periodic report P2 in M17.
For the end of ISOLDE project, all project partners strive to provide high performance RISC-V processing systems and platforms at least at TRL 7 for the vast majority of building blocks, demonstrated for key European application domains defined as Automotive, Space, Smart home and Cellular IoT.
For the end of ISOLDE project, all project partners strive to provide high performance RISC-V processing systems and platforms at least at TRL 7 for the vast majority of building blocks, demonstrated for key European application domains defined as Automotive, Space, Smart home and Cellular IoT.