Periodic Reporting for period 1 - FIXIT (Scaled FerroelectrIc X-bars for AI-driven sensors and actuaTors)
Reporting period: 2023-11-01 to 2024-10-31
A drastic improvement in the energy efficiency of information technologies imperative and can no longer be delayed. It represents the only viable route to reconcile the digital transformation with the carbon footprint reduction, whose alignment was identified by the European Commission as critical pathway for sustainable development. Energy efficient edge-computing technologies are not only very important per se, but they will also reduce the workload of mobile networks for cloud connections, thus reducing the energy demand and carbon footprint of information technologies.
The project FIXIT that started off in November 2023 addresses the challenge to develop an innovative ultra-low power computing platform. Thus, FIXIT contributes to the development of key enabling technologies as a major groundwork to reinforce and maintain Europe’s position at the forefront of AI hardware development and utilization and finally to make Europe the first digitally led circular, climate-neutral and sustainable economy through the transformation of its mobility, energy, construction and production systems.
Within FIXIT we build on two recent European discoveries of ferroelectricity, namely in CMOS compatible fluorite-type Hf0,5Zr0,5O2 and wurtzite-type AlScN materials. The development and co-integration of novel non-volatile ferroelectric synaptic devices (FSD) promises a tremendous increase of functionality over conventional CMOS technologies. Moreover, while ferroelectricity is considered as most energy efficient non-volatile storage technology, the combination of memory and logic functionality within one device allows to greatly reduce the data movement between storage and computing units in conventional systems. Thus, computation based on FSDs finally will lead to a minimization of the energy consumption on system level. In order to compete with conventional technologies we aim at scaling the FSDs towards the 20nm regime, while targeting at improved ferroelectric device performance with ultra-low power consumption, eventually fostering the miniaturization of self-sustaining electronic devices.
In a multi-disciplinary approach FIXIT encompasses all aspects starting from the development of ferroelectric materials and corresponding manufacturing process technologies via ferroelectric device design starting at technology readiness level 1 (TRL1), characterization, modelling and hybrid integration or packaging together with conventional CMOS designs towards the demonstration of seamlessly embedded integration into electronic systems. Our final goal is the demonstration of superior energy efficiency and performance of our computing platform in an AI-driven sensing application at TRL4.
The major objectives of the FIXIT project are:
• To provide ferroelectric materials and manufacturing processes for scaled FSDs ≤ 400 nm²
• To understand the analogue switching FSDs and to provide models for circuit design
• To manufacture and integrate FSDs into computing crossbar structures
• To demonstrate FSD array operation at system level
In order to make these contributions effective for the European Green Deal (e.g. targeting at a reduction of the emission of global warming gasses by 55% compared to 1980 already by 2030) FIXIT will disclose the pathway for industrial uptake of ferroelectric synaptic technologies not only towards the electronic component production by European semiconductor foundries, but further along the value chain towards industrial product development. Thus, FIXIT will critically contribute to the strategic European autonomy and competitiveness in the development and application of novel digital technologies.
The project FIXIT that started off in November 2023 addresses the challenge to develop an innovative ultra-low power computing platform. Thus, FIXIT contributes to the development of key enabling technologies as a major groundwork to reinforce and maintain Europe’s position at the forefront of AI hardware development and utilization and finally to make Europe the first digitally led circular, climate-neutral and sustainable economy through the transformation of its mobility, energy, construction and production systems.
Within FIXIT we build on two recent European discoveries of ferroelectricity, namely in CMOS compatible fluorite-type Hf0,5Zr0,5O2 and wurtzite-type AlScN materials. The development and co-integration of novel non-volatile ferroelectric synaptic devices (FSD) promises a tremendous increase of functionality over conventional CMOS technologies. Moreover, while ferroelectricity is considered as most energy efficient non-volatile storage technology, the combination of memory and logic functionality within one device allows to greatly reduce the data movement between storage and computing units in conventional systems. Thus, computation based on FSDs finally will lead to a minimization of the energy consumption on system level. In order to compete with conventional technologies we aim at scaling the FSDs towards the 20nm regime, while targeting at improved ferroelectric device performance with ultra-low power consumption, eventually fostering the miniaturization of self-sustaining electronic devices.
In a multi-disciplinary approach FIXIT encompasses all aspects starting from the development of ferroelectric materials and corresponding manufacturing process technologies via ferroelectric device design starting at technology readiness level 1 (TRL1), characterization, modelling and hybrid integration or packaging together with conventional CMOS designs towards the demonstration of seamlessly embedded integration into electronic systems. Our final goal is the demonstration of superior energy efficiency and performance of our computing platform in an AI-driven sensing application at TRL4.
The major objectives of the FIXIT project are:
• To provide ferroelectric materials and manufacturing processes for scaled FSDs ≤ 400 nm²
• To understand the analogue switching FSDs and to provide models for circuit design
• To manufacture and integrate FSDs into computing crossbar structures
• To demonstrate FSD array operation at system level
In order to make these contributions effective for the European Green Deal (e.g. targeting at a reduction of the emission of global warming gasses by 55% compared to 1980 already by 2030) FIXIT will disclose the pathway for industrial uptake of ferroelectric synaptic technologies not only towards the electronic component production by European semiconductor foundries, but further along the value chain towards industrial product development. Thus, FIXIT will critically contribute to the strategic European autonomy and competitiveness in the development and application of novel digital technologies.
The first year of the FIXIT project has been defined by notable accomplishments in managing work packages, laying a solid foundation for effective collaboration among all partners.
The project's kick-off meeting took place successfully in Berlin in January 2024, officially launching the initiative. This event gathered all consortium partners, offering a platform to present the project's vision, objectives, and initial work plan. It fostered alignment among partners on the project's goals and set the stage for productive collaboration moving forward. Since then the collaboration has been continuously intensified and on the experimental side a solid foundation concerning materials development, device integration as well as test structure design has been layed.
In work package 2, which mainly deals with the material optimization, the focus was on the development and application of physical and electrical characterization techniques as ground work for the optimization of the ferroelectric thin films and scaled ferroelectric synaptic devices.
The activities concerning device manufacturing are performed in work package 3. In this work package the focus was on the development of integration flows for scalable integrated FSDs and manufacturing as well as characterization of single devices and small arrays.
The simulation and modelling activities are concentrated in activities of work package 4. Within the first reporting period the focus was on setting up the simulation frameworks and the definition of first FSD design guidelines. Additionally, first work concerning the investigation of transport mechanisms was started. Moreover, first SPICE models of FSDs for the adoption in the circuit design activities of work package 5 were prepared.
Finally, the work on array operation and demonstration in work package 5 - targeting our final objective – has just started in the first reporting period . Here, the focus was mainly on the definition of a demonstrator specification and the design and first tape-out of initial test structures targeting at an early learning process for co-integrated hardware before the final demonstrator tape-out will be prepared in the second reporting period.
The project's kick-off meeting took place successfully in Berlin in January 2024, officially launching the initiative. This event gathered all consortium partners, offering a platform to present the project's vision, objectives, and initial work plan. It fostered alignment among partners on the project's goals and set the stage for productive collaboration moving forward. Since then the collaboration has been continuously intensified and on the experimental side a solid foundation concerning materials development, device integration as well as test structure design has been layed.
In work package 2, which mainly deals with the material optimization, the focus was on the development and application of physical and electrical characterization techniques as ground work for the optimization of the ferroelectric thin films and scaled ferroelectric synaptic devices.
The activities concerning device manufacturing are performed in work package 3. In this work package the focus was on the development of integration flows for scalable integrated FSDs and manufacturing as well as characterization of single devices and small arrays.
The simulation and modelling activities are concentrated in activities of work package 4. Within the first reporting period the focus was on setting up the simulation frameworks and the definition of first FSD design guidelines. Additionally, first work concerning the investigation of transport mechanisms was started. Moreover, first SPICE models of FSDs for the adoption in the circuit design activities of work package 5 were prepared.
Finally, the work on array operation and demonstration in work package 5 - targeting our final objective – has just started in the first reporting period . Here, the focus was mainly on the definition of a demonstrator specification and the design and first tape-out of initial test structures targeting at an early learning process for co-integrated hardware before the final demonstrator tape-out will be prepared in the second reporting period.
bBesides gathering already significant insights on the characterization and modeling level which already lead to 6 publications, on the hardware level so far no fully completed experimental results are to be reported. Instead, first verified hardware results in terms of scaled device characterization and crossbar integration are envisaged for the second reporting phase of the project.