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Non-uniform programmable integrated photonic waveguide meshes

Periodic Reporting for period 1 - NU-MESH (Non-uniform programmable integrated photonic waveguide meshes)

Reporting period: 2023-11-01 to 2025-04-30

Programmable integrated photonics (PIP) is an emerging new paradigm that aims at designing common integrated optical hardware resource configurations, capable of implementing an unconstrained variety of functionalities by suitable programming. The work carried out within the Advanced Grant ERC-ADG-2016-741415 UMWPCHIP of which I was the Principal Investigator, allowed me to lay the foundation for the first technical stages of a novel revolutionary concept, the Field Programmable Photonic Gate Array (FPPGA), developed in the context of a Proof-of-concept Grant ERC-POC-2019-859927-FPPAs. Currently, the core of the processor is a uniform 2D programmable photonic waveguide mesh, formed by replicating hexagonal unit cells. This layout suffers from limited flexibility in the spectral period and sampling time values. The challenge is to develop and demonstrate solutions that overcome these limitations and which can be easily incorporated into existing mesh designs. In NU-Mesh I aim to demonstrate and validate the concept of non-periodic programmable photonic integrated waveguide meshes formed by embedding defect cells into the otherwise uniform 2D hexagonal mesh.
Including defect cells solves the problem of spectral period limitation through the exploitation of the Vernier effect as well as the as the sampling time resolution limitation of the uniform waveguide mesh. My working roadmap will include: 1) carrying out the required research activities linked to the development of the proposed technical concepts, 2) validating them through outsourced chip fabrication in an external foundry followed by measurement and characterization experiments carried out in my lab at UPV, 3) generating the new intellectual property rights (IPRs) for the new results via patent writing and application and transferring the new IPR to the spinoff company iPronics, which I co-founded three years ago with the help of ERC-POC-2019-859927-FPPAs.
The project was structured into three tasks:
• Task 1: Research
• Task 2: Software development
• Task 3: IPR generation, protection and licensing.

Task 1: Hardware Development.
We have researched and proposed several configurations for the implementation of defect cells both for hexagonal and square waveguide meshes. We paid particular attention to the case of single defect cells for hexagonal meshes where the external perimeter of the defect cell is still hexagonal. Figure 1 show several of the proposed designs, all of them are original. We then proceed to carry the spectral analysis of interfacing a uniform and a non-uniform cavity in terms of Vernier effect and also proposed the embedment of non-uniform single cavities inside an otherwise uniform mesh. Some representative results are shown in figure 2. From figure 2 it is shown that the spectral period of a single hexagonal cavity can be enhanced via Vernier effect by a factor of up to 22. We also proposed the design of “linear defect” type waveguide meshes, where the defects exhibit a 1D configuration. An example is shown in figure 3. We selected a simple four cell configuration that could help us to verify the viability of the concept. The design, shown in figure 4 combines 2 uniform hexagonal cell and two defect cells, each one of the latter displays a different internal cavity structure.

2.2 Task 2: Fabrication, tests, and validation
We completed a GDS file for the selected design shown in figure 4 using a flattened waveguide mesh configuration. The layout for the uniform and defect cells and the overall mesh is shown in figure 5. The GDS design and checking was concluded in February 2024, and the chip was sent for fabrication to a Silicon Photonics foundry. The fabricated chip was received in September 2024 and was initially characterized through the measurement of its testing structures before sending it for packaging, which was completed by the end of November 2024. Figure 6 shows the detail of the bare and packaged fabricated chip. The final chip test, measurement and characterization was started in December 2024 and concluded in February 2025. The measurements where carried for three different vernier cavity configuration yielding excellent agreement between theoretical and experimental demonstrations. Figure 7 shows the detail of some of these measurements.

2.3 Task 3: IPR generation, protection and licensing.
We developed our strategy roadmap taking into consideration the need to protect the results prior to publication. To speed up the project we filed our main patent application (PCT/ES2023/070615) after the signature of the Grant Agreement Period but a few days (12) before the official starting of the grant. With the exception of several conference publications in 2024 and 2025 we decided to wait until the completion of the final measurements to submit a full manuscript accounting for the work carried under this grant. An initial version was uploaded to the ArXiV platform in February 2025 and a full complete version was submitted and it is under review in the journal Science Advances.
The main objectives targeted in the ERC-POC project have all been completed and all theoretical and experimental results are beyond the current state of the art in programmable photonics. With the aforementioned progress achieved in Tasks 1-2 we believe that we have reached the required technical level for the transfer of this new technology to industry. In this respect, we would like to point out that the company iPronics, Programmable Photonics has communicated to the Universitat Politècnica de Valencia its disposition to buy the patent PCT/ES2023/070615. UPV and iPronics, Programmable Photonics are in process of completing this transaction.

As for the research side, we have started to work on a novel promising concept for the implementation of non-uniform waveguide meshes based on 2D Origami designs. The work has just started three months ago but we plan to report the first results in January 2026 at the Photonics West Conference organized by SPIE.
(left) bare silicon photonics fabricated chip for the non-uniform waveguide mesh layout shown in fig
Selected non-uniform waveguide mesh layout for fabrication
(left) Flattened hexagonal mesh designs optimized for space efficiency. The modified layout aligns a
Different designs of defect hexagonal waveguide meshes where the external perimeter is hexagonal but
An example of a linear defect made of defect hexagonal cells inserted into a uniform 2D configuratio
fine and coarse tuning measurements of three programmable Vernier cavities featuring x3.6, x6 and x1
Different Vernier cavity arrangements obtained combining a uniform cell with a defect hexagonal cell
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