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Working group on asynchronous circuit design

Objective

- Facilitate the interchange of experiences between Europe's leading research teams and with industry

- Organise European workshops for regular exchange of information and discussion between teams and industry.

- Organise European teaching and training activities aimed at university students, young researchers and practising engineers, in the form of a summer school.

- Make a bid to host Async98, the Third International Symposium on Advanced Research in Asynchronous Circuits and Systems.

ACiD-WG coordinates multidisciplinary (electrical engineers and computer scientists) research, training and dissemination activities in Europe concerned with the design of very low power asynchronous digital VLSI circuits.
The inherent modularity of asynchronous circuits makes it possible to design functions in a high-level programming language. Consequently, the working group will also be active in the area of silicon compilation and, in particular will build on the experiences gained in EP 6143 EXACT where work focused on the Tangram compiler developed within PRL.
The Group will also be active in the area of synthesis and verification of asynchronous logic taking results from theoretical computer science, in particular, Petri nets and process algebras, adapted to the task of specifying, designing and verifying circuits.

Funding Scheme

ACM - Preparatory, accompanying and support measures

Coordinator

South Bank University
Address
Csse Room 402 - Borough Road 103
SE1 0AA London
United Kingdom