The CANDI project aimed to develop the main technologies and implementation techniques needed for the fabrication of complete analogue/digital systems on silicon, exploiting the specific advantages of both bipolar (high-speed components, high driving capability and high-precision analogue circuitry) and CMOS (high integration density and low power consumption) transistors.
The combined analogue to digital integration (CANDI) project aims at the development of the main technologies and implementation techniques needed for the fabrication of complete analogue to digital (AD) systems on silicon, exploiting the specific advantages of both bipolar (high speed components, high driving capability and high precision analogue circuitry) and complementary metal oxide semiconductor (CMOS) (high integration density and low power consumption) transistors. The final objective is the full integration of technology, design and computer aided design (CAD) tools in the fabrication of prototype system components for major fields of application such as consumer electronics and telecommunications.
The project has 2 phases. The first phase has been competed. It led to the development of a common 1.2 micron technology starting from a 1.2 micron CMOS process, with 5 additional mask levels for the incorporation of the bipolar part. A layout cross compilation system has been developed which is used to translate layouts of cells, subcircuits or entire circuits implemented in a given technology into layouts of a different version of the same technology. This includes the possibility of converting layouts from a pure CMOS technolgoy into the CMOS part of a BICMOS technology. Geometrical and electrical relations between the 2 different technologies are taken into consideration in the translation.
A specific cell library database has been developed, containing all relevant data, which can be distributed on VAX computers.
The manufacturability of the process and the design capabilities have been proven through the fabrication of 3 demonstrators: a digital luminance and chrominance to analogue RGB (red green blue) components decoder for improved definition television (IDTV) applications; a mixed AD array, including a bipolar high frequency array and a BICMOS sea of gates array; and a 16-channel bit shuffler for broadband telecommunication multiplexing.
The sec ond phase of the project is leading to the development of a 0.8 micron process generation as well as to design techniques that will enable the realization of highly complex high performancecircuits. 2 technologies are being developed covering complementary market segments. A high speed version with 5 V supply voltage for both CMOS and bipolar, suitable for application specific integrated circuit (ASIC), telecommunication and high definition television (HDTV) applications has been developed. A technology with high performance analogue capabilities has been developed where the supply voltage is 5 V for CMOS and 9 V for bipolar. This technology will address radio mobile, automotive, consumer electronic and telecommunication applications.
The final objective was the full integration of technology, design and CAD tools in the fabrication of prototype system components for major fields of application such as consumer electronics and telecommunications.
NN12 8EQ Towcester