Objective
Acquisition of knowledge in VHDL standard language for hardware specification, synthesis and documentation.
Reduction of design time from between 6 to 30 weeks down to 2 to 10 weeks.
Improved testability reducing failure rate to 25% of current value
Improved reliability and functionality together with 20% reduction in cost.
The Application Experiment is TRINAMIC's entry into the field of ASIC design. TRINAMIC's know-how from the development of a range of microcontroller based stepper motor controllers will be used to design an advanced single chip stepper motor controller (MCC). The MCC will be implemented as an ASIC in co-operation with the University of Hamburg using state-of-the-art Cadence DFW-II chip development tool chain which has been in use at the university for several years.
Call for proposal
Data not availableFunding Scheme
ACM - Preparatory, accompanying and support measuresCoordinator
22303 Hamburg
Germany