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Content archived on 2024-05-14

Architecture for single chip for private mobile radio communication

Objective

Realisation of analogue and digital building blocks targeted to ASIC implementation of control and baseband processing for TETRA/TETRAPOL private mobile radio systems;
Realisation of single chip control and baseband processing ASIC integrating analogue, embedded controller and digital signal processing function blocks;
Development and demonstration of an enhanced real-time operating system and debugger for the target applications;
Development and demonstration of an optimising compiler for the Picollo DSP core;
Development of user development boards;
Partners, Matracom and OTE, will incorporate the ASICs into terminal demonstrators for the TETRAPOL and TETRA systems respectively.

The project will provide telecommunication equipment manufacturers with the capability to integrate using a single ASIC all the baseband and control circuitry of a digital radio terminal compliant with the TETRA and TETRAPOL standards. These terminals represent 30% of the private mobile radio (PMR) market, and this projects enables lightweight terminals with long battery life to be realised.
Key analogue elements of the project are the Mixed-Signal Cells, I/Q RF Codec and CCITT Voice Codec. The analogue work will build on the design know how and the cells produced in ALCD Project, ESPRIT 8030 which now form part of ATMEL's pre-characterised standard cells library.
Digital design will focus on integrating the ARM7TDSP combined controller/DSP (Thumb/Picollo) core which provides a state-of-the-art performance and low power dissipation for implementing the control and baseband processing functions. This work will also include further development of the real-time operating systems and high level language programming tools to enable optimised algorithmic-level DSP compilation.

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CSC - Cost-sharing contracts

Coordinator

Atmel Es2
EU contribution
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Address
Zone Industrielle
13106 Rousset
France

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Total cost

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Participants (5)

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