The objective of this project was the development of a multichamber batch reactor in which interpoly silicon oxide and silicon nitride films, combined in a so-called ONO configuration, can be produced in one reactor system.
The objective of this project is the development of a multichamber batch reator in which interpoly silicon oxide and silicon nitride films, combined in a so-called oxynitride oxide (ONO) configuration, can be produced in one reactor system.
The construction of a Mark 1 prototype and its installationm were accomplished by the end of 1990. Etching rates and surface concentrations (by X-ray photoelectron spectroscopy (XPS) and wettability) have been investigated under a wide variety of process conditions to assess process uniformity on the same wafer and from wafer to wafer on complete batches, as well as to evaluate run to run reproducibility. The objective of establishing a process whereby native oxide is removed over a batch of 25 wafers without significant etching of other oxides on the wafers has been achieved. It has also been shown that the oxygen content can be reduced to a fraction of a monolayer and the surface is well passivated against reoxidation. In addition metallic contamination studies have revealed no increase of copper, nickel or iron on wafers run in the high frequency (HF) vapour reactor as compared to control wafers.
Electrical tests on capacitors fabricated with the Mark 1 oxide as dielectric have repeatedly demonstrated that, compared to conventional wet etching techniques, the in situ HF vapour preetch of the native oxide prior to its bottom dry oxidation process does provide superior vertical characteristics of the bottom oxide. Equally important for advanced ONO deposition, where further shrinkage of the dielectric's thickness is required, is the control and optimization of the nitride film deposition process. For this, the Mark 1 prototype has demonstrated its excellent capabilities. For the first time it has been possible to study the nitride deposition kinetics on clean (ie native oxide free) silicon surfaces. For the ONO application, in particular, it has been concluded that: the novel nitride process developed in the Mark 1 system prod uces films that are already continuous below 30 augstrom and that compared to conventional processing, the clustered oxide nitride (ON) process in Mark 1 provides better control.
To demonstrate the superior electrical characteristics of ONO films grown in such a reactor, state of the art erasable programmable read only memory (EPROM) and electrically erasable programmable read only memory (EEPROM) structures with a dielectric stack in the range of 20-30 nm are being manufactured and tested. For purposes of comparison electrical evaluation of different ONO recipes has been performed using a dedicated test pattern for 4 Mbit EPROM, in order to find the best interpoly dielectric characteristics which can be obtained in conventional furnaces.
A prototype was made available on 24/12/92
In state-of-the-art devices, interpoly ONO films are implemented in the floating gate structure of EPROM and EEPROM devices. Following the development of higher circuit integration and the corresponding reduction in dielectrics thickness, it appears that the integrity of the interfaces between the various layers will soon become the limiting factor in the electrical performance (electrical defect density, charge retention) of future devices. It is thus important that the dielectric structure is deposited in a single vacuum system, preventing the wafers from coming into contact with air, before the capacitive structure is completed. In the latter case, in fact, the resulting uncontrolled growth of native oxide films combined with the exposure of the surfaces to chemical contaminants would lead to the degradation of the interface quality in an unreproducible way, adversely affecting the electrical characteristics of the devices.
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