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Content archived on 2024-05-14

SCI development and exploitation in Europe

CORDIS provides links to public deliverables and publications of HORIZON projects.

Links to deliverables and publications from FP7 projects, as well as links to some specific result types such as dataset and software, are dynamically retrieved from OpenAIRE .

Exploitable results

The Scalable Coherent Interface (SCI) is an IEEE standard (1596-1992) that defines a high-speed, scalable, bus-like interconnect that connects nodes, processors, memories, peripheral devices, commodity workstations or PCs in a high-performance parallel system. SCI Europe has developed two basic technology items: The LINK CONTROLLER 3 (LC3) (from Dolphin ICS, the third-generation SCI-link interface chip), and the PAROLI module (from Infineon for parallel optical communication). These have each been specified, designed, fabricated, tested and rendered market-ready, enabling all SCI systems to achieve an improved and an even better performance. Instruments, software and simulation models have also been developed for testing and for performance evaluation. The components developed have been used to design two full-blown applications of significant value which use these technologies. Developed by Siemens, the first of these applications has demonstrated a cost-effective, high-performance, and highly scalable Video-on-Demand system. This system offers increased scalability and at a much lower cost than existing solutions based on MPP (Massively Parallel Processing) clusters and represents a new competitive edge for this market. Thomson-CSF Detexis has developed a second application within modular avionics. Project URL: http://www.oslo.sintef.no/ecy/projects/SCI_Europe/index_net.html
The LINK CONTROLLER 3 is the 5th generation (Scalable Coherent Interface) SCI link chip developed by Dolphin Interconnect Solutions. In the Esprit project "SCI Europe", users have gathered experience and developed applications for the construction of the chip, as they have also done to utilize the properties of this and previous generation chips in advanced applications. The LC3 implements 800 Mbytes/s SCI links in cheap CMOS technology and has improved link chip architectural features. The Dolphin LINK CONTROLLER 3 (LC3) provides possibilities for very flexible high speed and low latency interconnect as well as a wide range of interconnect topologies at a favourable price. The application area today is somewhat limited to high performance servers, but the different architectures implemented in the server applications show the great versatility of the technology. Dolphin is opening up its technology to all application and business areas for the first time and is actively seeking partners for this process. Dolphin expects this to create some very exciting results at system level.

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