Skip to main content

Development of High Temperature Survival Electronic Devices for Engine Control Systems

Final Report Summary - HIGHTECS (Development of High Temperature Survival Electronic Devices for Engine Control Systems)

Executive Summary:
This project covered the development of a distributed high temperature electronics platform for integration with sensor elements to provide digital outputs that can be used by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. This distributed electronics platform eliminates the need for the FADEC or EHMS to process the electronic signal, which will assist in making the overall system more efficient in processing only digital signals. This will offer weight savings in cables, harnesses and connector pin reduction and through less complex cooling systems.

A high level draft technical specification was provided by Turbomeca. The design concept was to take the output from several on-engine sensors (temperature probe, thermocouple, strain gauges, frequency), carry out the signal conditioning on the sensor signals, multiplexing, analogue to digital conversion and transmission of the data through a serial data bus. The unit has to meet the environmental requirements of DO-160 for a helicopter engine, with the specific need to operate at 200oC, with short term operation at temperatures up to 250oC. The system service lifetime target is 50,000 engine flight hours.

The design principle of the HIGHTECS module was based on a custom silicon on insulator (SOI) ASIC being used for the majority of the signal processing and conditioning from the range of sensors, multiplexing, analogue to digital conversion and transmission of data through an ARINC 429 databus. The ASIC was then integrated with a high temperature external clock and packaged onto a ceramic hybrid circuit. This hybrid circuit was assembled in a Kovar package, which was hermetically sealed in an inert gas atmosphere. The Kovar package was then mounted into a stainless steel enclosure containing high temperature connectors and EMI shielding.

The HIGHTECS ASIC, hybrid circuit and module have been designed and manufactured. The HIGHTECS ASIC has successfully demonstrated dual output of ARINC 429 messages; however, problems have been encountered in achieving a consistent linear output in the Analogue to Digital Conversion (ADC) transfer function. The hybrid circuit and module has also produced ARINC 429 messages, but the output has been inconsistent, which again is believed to be related to the ADC transfer function. The ADC, which was supplied to the project as an existing IP block, is sensitive to its supply voltages and does not meet its published specification. The discontinuities reduce as the analogue supply voltage is increased above the digital supply voltage and as the temperature is increased above ambient. The voltages needed to eliminate the discontinuities are above that recommended for the SOI ASIC process. A small number of devices were identified which had a functioning ADC at a digital voltage of 5V and analogue voltage of 5.5V and these devices have been assembled into the HIGHTECS hybrid circuit and module. The results show that the HIGHTECS module can function between -40oC and +225oC, with linearity of output improving as the temperature increases. A re-spin of the ASIC design was carried out to address the issues of the inconsistent ADC functionality by bringing out separate voltage references and improving the connections around and to the ADC block. The results on the 2nd version of the HIGHTECS ASIC show the analogue sensor conditioning and frequency measurements functions in line with specification on the ASIC over the temperature range -40oC up to 250oC with operation up to 275oC. However the ADC output is not linear at 5V, which is the recommended voltage for the SOI process and further work will be required outside the scope of this project to develop an improved ADC IP block which can function at 5V.
The results of long term temperature storage tests at 250oC on a SOI test device fabricated with the same semiconductor process as the HIGHTECS ASIC has indicated that the longevity exceeds the target operating lifetime of 50,000 hours based on the temperature profiles provided by Turbomeca.

Exploitation of the project results will take place through custom ASIC and Multi-Chip Module design, high temperature electronics packaging technology and knowledge of failure modes, lifetimes and reliability prediction. Dissemination of the results will be achieved through presentations to interested parties within EU Clean Sky and selected wider publication to high temperature electronics networks (e.g. HITEN).

Project Context and Objectives:
This project covered the development of a distributed high temperature electronics platform for integration with sensor elements to provide digital outputs that can be used by the FADEC (Full Authority Digital Electronic Control) system or the EHMS (Engine Health Monitoring System) on an aircraft engine. This distributed electronics platform eliminates the need for the FADEC or EHMS to process the electronic signal, which will assist in making the overall system more efficient in processing only digital signals. This will offer weight savings in cables, harnesses and connector pin reduction and through less complex cooling systems.

For aero-engine applications, it is desirable to mount the engine control unit on to the fan casing, where the ambient temperatures may reach 250oC, especially after landing when the engine is turned off. Currently cooling of the engine control unit containing conventional electronics (qualified for operation between -55oC and +125oC) is provided by routing and interfacing engine fuel via heat sinks. The use of high temperature electronic components which can operate long term at temperatures up to 250oC would remove the need for special fuel pumping, fuel interfacing and complex heat sinks having integrated fuel-fed cooling tubes. Although silicon based electronics have been shown to function at temperatures of up to 200oC, the key problem is the performance degradation due to an increase in leakage currents at elevated temperatures. This problem can be virtually eliminated through the use of Silicon-on-Insulator (SOI) technology, where a monocrystalline film of silicon is deposited on top of an insulating layer. This technology has provided the main impetus for the development of high temperature electronic devices operating at temperatures up to 250oC. Other materials such as Silicon Carbide (SiC) have promise for even higher temperature performance, but the development of devices using this material is limited at present to basic electronic functions (e.g. diodes, MOSFETs).

The overall objective of the HIGHTECS project was to design, develop and validate a prototype high temperature miniaturised distributed electronic platform for aircraft engine application, which is capable of operating at up to 250oC for the lifetime of the aircraft engine (up to 50,000 operating hours).

The work programme was divided into the following work packages:

Work Package 1: Definition of Input Specification
Work Package 2: Technology Assessment and Selection
Work Package 3: Definition of Prototype System
Work Package 4: Manufacture of Prototypes
Work Package 5: Assessment of Prototype Performance
Work Package 6: Exploitation Planning
Work Package 7: Project Management

Work Package 1: Definition of Input Specification

A high level input specification was generated by Turbomeca based on their requirements for sensing various functions on a helicopter engine, as shown in Fig. 1. Feedback on this specification has been provided by the HIGHTECS team to create a specification with the aim of maximum flexibility for different end-sensing applications, but with common building blocks of functionality as an ASIC and an understanding of a typical lifetime regime of aero-engines used in civil aerospace markets. The high level specification includes details of the EMI/Lightning protection, networking and packaging requirements for an engine control system. The hardware was developed in accordance with DO-254, Level B (Design Assurance Guidance for Airborne Electronics Hardware) procedures. The lifetime requirements in terms of various temperature profiles during operation of the unit were defined.

Details of the high level input specification are presented in the Project Results section of this report.

Fig 1. Block diagram showing functions proposed for high temperature ASIC
Work Package 2: Technology Assessment and Selection

The two main areas focused on within the project were:

Electronic devices – building on the knowledge gained in high temperature electronics at GE Aviation Systems and GE Global Research using silicon-on-insulator (SOI) based technology and the commercial availability of high temperature active components. The use of high temperature passive components (capacitors, resistors) and devices/circuits for EMI/lightning protection were assessed for their temperature performance.

Packaging Technology – Extending the reliability data for the packaging and interconnect system through life tests and studies of failure mechanisms after temperature storage, temperature cycling and vibration.

The ranking of the existing and embryonic technologies has been undertaken by Oxford University Materials, drawing on their expertise of process technologies, failure analysis and accelerated life tests on high temperature electronics and materials. This has enabled the concept prototype system to be defined in terms of the technical specification, target price, environmental impact, lifetime predictions and risk analysis/mitigation.

Details on the technology assessment and selection are presented in the Project Results section of this report.

Work Package 3: Definition of Prototype System

An ASIC based on SOI semiconductor technology together with the control and protection circuitry was designed. The ASIC was designed to condition the signals from the various sensors, perform an Analogue to Digital Conversion (ADC) and transmits the serial data through an ARINC 429 databus. The ASIC has been designed to be integrated into a ceramic based multi-chip module together with a precision resistor, crystal oscillator, lightning protection devices and high temperature resistors and capacitors, built onto an alumina substrate and housed in a metal package. A high temperature printed circuit board (PCB) containing resistors has been designed for one part of the sensor conditioning circuit. The hybrid circuit and high temperature PCB containing resistors are housed in a stainless steel enclosure (including EMI gaskets) with connectors for inputs/outputs.

Details on the prototype system design are presented in the Projects Results of this report

Work Package 4: Manufacture of Prototypes

The SOI ASIC has been manufactured with dimensions of 6.0mm x 7.45mm. The ASIC has been assembled into PGA packages for functional and characterisation tests. The ASIC has also been assembled into the hybrid circuit with the other components in the prototype design. This hybrid circuit has been mounted into the stainless steel enclosure along with the high temperature PCB containing resistors. A 2nd version of the HIGHTECS ASIC has been designed, manufactured and tested to address the issues noted in the 1st version of the HIGHTECS ASIC, particularly on the linearity of the ADC function.

Details on the manufacture of the prototypes are presented in the Project Results of this report.

Work Package 5: Assessment of Prototype Performance

Functional, limited characterisation and environmental tests have been carried out on the ASIC assembled in a PGA package. A high temperature printed circuit board has been designed and manufactured to carry out more detailed characterisation of the ASIC assembled in a PGA package.

Functional testing of the hybrid circuit containing the ASIC has been undertaken.

The results achieved are presented in the Project Results of this report.

Work Package 6: Exploitation Planning

For the aero-engine market, the extended high temperature electronics capability will facilitate the implementation of distributed architectures, where smart actuators and sensors can replace (or off-load) the centralised control electronics. Up to 500 conductors are currently used for interfacing between engine sensors, actuators, flight control computers and the centralised FADEC. The application of distributed architectures could reduce the conductor count from 500 to 8 for duplex control, offering cable and harness weight saving, connector pin reduction, fault reduction and a simpler FADEC. This type of electronic unit will be installed inside the actuator or sensor housing and would consist of the sensor signal conditioning electronics, A/D converters, multiplexers and a serial interface bus.

A business plan and dissemination plan for the results from the HIGHTECS project have been prepared, and summarised in the Impact/Dissemination/Exploitation section of this report.

Project Results:
High Level Input Specification

A high level draft technical specification was provided by Turbomeca as the basis for the design of the high temperature electronics platform. The design concept was to take the output from several on-engine sensors (temperature probe, thermocouple, strain gauges, frequency), carry out the signal conditioning on the sensor signals, multiplexing, analogue to digital conversion and transmission of the data through a serial data bus. The DC power supply for the unit is provided by the FADEC. The unit has to meet the environmental requirements of DO-160 for a helicopter engine, with the specific need to operate at 200oC, with short term operation at temperatures up to 250oC. The system service lifetime target is 50,000 engine flight hours.

Technology Assessment and Selection

A review of the options for the high temperature electronics to be considered for the HIGHTECS module was carried out. This review included the availability of devices and components, the status of high temperature electronics packaging technology, an assessment of the technology maturity, potential failure modes and a review of accelerated life tests to predict service life.

For the electronic devices and components, an ASIC based on a Silicon-on-Insulator (SOI) semiconductor manufactured using the X-FAB 1µm SOI foundry in Germany was selected to perform the analogue signal conditioning, multiplexing, ADC (Analogue to Digital Conversion), logic control and serial data transmission. The circuit also required additional high temperature voltage regulators, a clock oscillator, capacitors, precision resistors and lightning protection devices, all of which should be capable of meeting the high temperature operating conditions. The review highlighted the limitations of ceramic based capacitors and Si based lightning protection devices. High temperature silicon capacitors produced by Ipdia – France became available during the course of the project and development SiC transient voltage suppressors, which have potential for operation above 150oC were evaluated.

The status of high temperature electronics packaging for the HIGHTECS module was also reviewed, covering materials and processes for die attach and wire bonding, attachment of passive devices and packaged components to ceramic substrates and connections for external inputs/outputs to/from the HIGHTECS module. An assessment of potential failure modes relating to the packaging technology options was undertaken, which highlighted areas to focus on within the testing programme.

The review covered the use of accelerated reliability tests to predict service life. In conclusion, the following tests were defined to address the concerns for the reliability of the electronics components and packaging technology operating at high temperature:
• Long term temperature storage at +250oC to assess the long term degradation at temperature
• Rapid thermal cycling from -40oC to +225oC to represent the stresses endured during the typical flight profile
• Vibration at room temperature and at 200oC to investigate whether the combined effect of vibration and temperature accelerates any failure mechanism

Tests have been carried out to investigate these factors on a SOI test chip.

Definition of Prototype System

The design principle of the HIGHTECS module was based on a custom silicon on insulator (SOI) ASIC being used for the majority of the signal processing and conditioning from the range of sensors (i.e. temperature probe, strain gauges, thermocouple, frequency), multiplexing, analogue to digital conversion and transmission of data through an ARINC 429 databus. The ASIC was then integrated with a high temperature external clock and packaged onto a ceramic hybrid circuit. This hybrid circuit was assembled in a Kovar package together with development high temperature SiC based transient voltage suppressors, which was hermetically sealed in an inert gas atmosphere. The Kovar package was then mounted into a stainless steel enclosure containing high temperature connectors and EMI shielding.

HIGHTECS SOI ASIC

The ASIC block diagram for the HIGHTECS module is presented in Fig. 2. From the analogue sensor outputs (temperature probe, strain gauges, thermocouple), the signals pass through buffers/low pass filters for conditioning and then into a 10:1 analogue multiplexer. The output from the analogue multiplexer is fed to an analogue to digital converter which outputs to the ARINC 429 bus.

From the frequency outputs (Nfreq and Qfreq), the signals are processed using comparators/counters, synchronised with an external clock and sent to a 16b digital multiplexer. The DIN input is also sent to the digital multiplexer. The digital multiplexer outputs to dual ARINC 429 buses. The ARINC 429 bus is the selected serial output from the HIGHTECS module.


Fig. 2. Block Diagram for SOI ASIC in HIGHTECS Module


The functional blocks for the HIGHTECS ASIC are presented in Table 1.

Table 1. Functional Blocks for HIGHTECS ASIC
Block Name Block Name
SG1 Bandgap
SG2 Global current mirrors
P3 Voltage generator
T4 Reference current generator
T1 ARINC Driver (x2)
TFo DIN (4i/ps)
NFreq ARINC Control sequencer
QFreq Nfreq &Qfreq logic
ADC

A picture of the 1st version of the HIGHTECS ASIC is presented in Fig 3. The ASIC contains all the sensor conditioning circuits, ADC, Multiplexer, Qfreq and Nfreq measurement and dual ARINC 429 outputs. The die size is 7.48mm x 5.95mm.



Figure 3. 1st Version of HIGHTECS ASIC – Device Size 7.48mm x 5.95mm

The 2nd version of the HIGHTECS ASIC was re-laid out and manufactured at XFAB, a die picture is shown in Fig. 4. Modifications were made to the layout of the connections to the ADC including bringing out of voltage references, and changes to the VHDL code for Tfo2 and Nfreq.

Fig. 4. Die picture of 2nd version of HIGHTECS ASIC

HIGHTECS Hybrid Circuit

The HIGHTECS hybrid circuit layout is presented in Fig. 5. The hybrid circuit contains the following components in addition to the HIGHTECS SOI ASIC:

• Voltage Regulators
• External Clock Generator/Crystal Oscillator
• Prototype SiC Transient Voltage Suppressors
• Resistors
• Capacitors

In addition to the hybrid circuit a high temperature printed circuit board containing resistors required for the frequency sensors was designed and manufactured. This board was also mounted in the HIGHTECS module.
Figure 5. Layout of HIGHTECS Hybrid Circuit
HIGHTECS Module

A drawing of the HIGHTECS module assembly is presented in Fig. 6.
The hybrid circuit (containing the ASIC) sealed in a hermetic Kovar package and the high temperature printed circuit board (containing resistors) is mounted into the stainless steel enclosure. A clamping plate is used to fix the Kovar package in place.
The stainless steel enclosure is completed by mechanical fixing of a lid with an EMI shielding gasket to the stainless steel base. Future versions may be welded, but, at this stage, a removable lid is preferred.
Two connectors are used; one for the sensor input signals and power supply, the other for the ARINC 429 serial databus outputs and connections. For the high temperature application, stainless steel based connectors are commercially available with an upper temperature limit of 260oC.
Filtering on the connector for improved EMC and lightning protection is not proposed at this stage for the HIGHTECS module. Based on the signal voltages and frequencies, additional filters may be required for future versions of the HIGHTECS module, which will be inserted between the connector pins and the leads on the Kovar package.

Fig. 6. Mechanical Assembly Drawing for HIGHTECS Module

Manufacture of Prototypes

HIGHTECS ASIC in PGA Package

A picture of a Si wafer containing the HIGHTECS ASIC is presented in Fig. 7. After initial probing, the wafer containing HIGHTECS ASIC was sawn into individual die and assembled into a 181 I/O High Temperature Co-Fired Ceramic (HTCC) Pin Grid Array (PGA) package using die attach, aluminium wire bonding and Au-Sn solder lid sealing in an inert atmosphere, see Fig. 8. The devices have been used for functional, characterisation and environmental testing.

Fig. 7. Silicon wafer containing HIGHTECS ASICs


Fig. 8. HIGHTECS ASIC assembled in HTCC PGA package

HIGHTECS Hybrid Circuit

The prototype hybrid circuit design was laid out for manufacture on a 96% alumina substrate. The circuit was built up using Au thick film and dielectric layers and the resultant substrate is shown in Fig. 9.

Fig. 9. HIGHTECS hybrid circuit substrate

The following components were assembled onto the substrate and the populated substrate is shown in Fig. 10.
• HIGHTECS ASIC
• Interposer
• Voltage Regulators
• Clock Oscillator
• Precision Resistor
• Resistors
• Capacitors


Fig. 10. HIGHTECS populated hybrid circuit substrate

The bare die components including the silicon capacitors were attached onto the thick film pads on the alumina substrate. TVS devices were only assembled into some of the hybrid circuits.



Assembly of Ceramic Substrate to Metal Package

The populated substrate was mounted into the metal package as shown in Fig. 11. Some of these samples were populated with prototype SiC transient voltage suppressors.


Fig. 11. HIGHTECS hybrid circuit mounted in metal package

A lid was resistance seam sealed onto the metal package in an inert atmosphere and gross/fine leak tested.

High Temperature PCB for Resistors

The size of the derated high temperature resistors for the frequency circuits precluded their use in the hybrid circuit. A separate high temperature circuit board was designed specifically for these high temperature resistors and the components were assembled using a high melting point solder, as shown in Fig 12.


Fig. 12. Resistors surface mounted onto high temperature printed circuit board

HIGHTECS Module

The hybrid circuit and high temperature pcb containing the resistors were mounted into the stainless steel enclosure, as shown in Fig. 13.


Fig. 13. Stainless Steel enclosure with mounted pcb and hybrid circuit

The connections between the leads on the metal package, connection pads on the printed circuit board and the connectors in the stainless steel enclosure were made with polyimide insulated copper wire, attached with high melting point solder.

The HIGHTECS module with the removable lid attached is shown in Fig 14.


Fig. 14. Stainless steel enclosure with lid incorporating EMI gasket





Assessment of Prototype Performance

The assessment of the HIGHTECS prototype parts has covered the following components:
• ASIC in PGA Package
• Hybrid Circuit
• High Temperature PCB for resistors
• HIGHTECS Module

An initial assessment of prototype SiC Transient Voltage Suppressors (TVS) devices in lightning tests has also been carried out.

Long term tests have also been performed on a SOI test chip to identify degradation mechanisms that may occur during the lifetime of the product.

ASIC in PGA Package

90 off ASICs were manufactured in 181 I/O PGA packages to enable functional and environmental tests to be carried out. A high temperature printed circuit board has been designed and manufactured to enable characterisation tests to be carried out.

Functional Tests

Functional testing of the HIGHTECS ASIC assembled in the PGA package has been carried out for the following blocks.

• Bias network
• Single ended to differential converter
• T1 channel measurements
• Band gap voltage
• Strain gauge bridge channels; SG11, SG12, P3
• T4 channel measurement
• Tfo1 and Tfo2
• ADC

The results have shown that the performance of the functional blocks was broadly in line with the expected performance from simulation. The HIGHTECS ASIC as designed has been also shown to function through to the generation of the dual output ARINC 429 data.


Fig. 15. HIGHTECS ASIC in PGA Package connected to ARINC 429 data reader

The dual outputs from the ARINC 429 databus on the HIGHTECS ASIC were connected to an AIM UK APU 429-4 2 channel transmitter/2 channel receiver to ARINC 429 interface, see Fig. 15. The data transmitted was then handled by an AIM UK PBA.pro-ARINC429 Database Manager Component. Representative output data are shown in Fig. 16.


Fig. 16. ARINC 429 Output from HIGHTECS ASIC
There are several areas of ASIC performance that need further attention, including the ADC, Tfo2 signal, and Nfreq.

ADC: The linearity of the ADC output has been shown to depend on the applied voltage and temperature, with some devices performing better than others, see Fig. 17 for a representative ADC outputs at -40oC, 20oC and +125oC.


Fig. 17. HIGHTECS ASIC ADC Output Device #21 at 6V at -40oC, 20oC and 125oC

It was believed that impedance on the ADC test pad cells may affect the ADC output. Trials were carried out to isolate the test pad cells from the circuit using a Focused Ion Beam (FIB), but this did not show any difference in the ADC output. An improvement in the linearity of the ADC output was observed when the digital and analogue Vdd were separated by 0.5V with 5.5V on Vddd and 6.0V on Vdda. In order to ensure consistent functionality of the majority of devices, the analogue and digital supply voltages of the ADC have to be increased to above 6V and 5.5V respectively. However, the voltages needed to eliminate the discontinuities are beyond the maximum voltage specification of the XFAB XI10 SOI process, which may limit operation lifetime, especially at high temperature. A small number of devices have been identified which had a functioning ADC at a digital voltage of 5V and analogue voltage of 5.5V and these devices have been assembled into the HIGHTECS hybrid circuit.
A modification to the layout of the connections to and the tracking around the ADC was required to reduce the sensitivity to the applied voltage which required a new mask set and re-spin of the ASIC.

Tfo1/Tfo2 Signal: Due to an error in the VHDL code, the Tfo2 sensor is a repeat of the Tfo1 sensor and will not show in the ARINC 429 message. This can be corrected by changing the VHDL code, which would require a respin of the ASIC

Nfreq: In the Nfreq module, there is a requirement for a Nfreq pulse before the state machine can change state. This works for frequencies below the minimum, but the state machine becomes stuck of the Nfreq frequency is zero. A change in the VHDL code to overcome this effect is required.

Design Changes Implemented for 2nd Version of HIGHTECS ASIC

The work on modifications to the ADC design was undertaken in two stages; the first through modification to the top metallisation layers on 1st version of the HIGHTECS ASIC and the second through a complete re-design of the mask set to incorporate the changes to the ADC and to Tfo2 and Nfreq VHDL code.

Modification to Top Layer Metallisations on 1st Version of HIGHTECS ASIC

The following changes were implemented in the re-layout of the top layer metallisations on 3 off wafers of the 1st version of the HIGHTECS ASIC held at pre-poly stage:

• Create separate Vrefp and Vrefn inputs of the ADC
• Re-route metallisation lines that were crossing ADC
• Connect DP and DQ to digital pads
• Vddd and Gnd connections of the comparators decoupled from those of the other digital part by direct routing to the pads

The wafers were manufactured at X-FAB and were then wafer probed using the ADC functionality test. The results showed that non-linearity of the ADC output was still apparent at Vdda 5V and 5.5V but was linear at 6V.

2nd Version of HIGHTECS ASIC

Based on the above results, the 2nd version of the HIGHTECS ASIC was re-designed and manufactured. The ASIC wafer was probe tested and selected samples which passed the within the limits set on the linearity of ADC functionality were assembled into PGA packages. The results of testing the ASICs in PGA packages at Vdda: 5.5V for ADC linearity is shown in Fig. 18.

Fig.18. ADC linearity plot of 2nd version of HIGHTECS ASIC assembled in PGA packages

Environmental Tests

High temperature storage tests (at 200oC and 250oC), temperature cycling and shock/vibration tests have been carried out on selected HIGHTECS ASICs assembled in PGA packages, see Table 2. The measurement of analogue Idd has been used as the measure to check on changes in value after testing. All measurements have been performed at room temperature to date.




Table 2. Summary of Environmental Tests on HIGHTECS ASIC in PGA package
Environmental Test Test Condition Average % Change in Idd Current
High Temperature Storage 8000 hours at 200oC -2.48%
High Temperature Storage 8000 hours at 250oC -5.27%
Temperature Cycling -40oC to +250oC, 375 cycles (min 3 hours at each limit) -5.39%
Vibration Random 10 – 2000Hz, 0.1g/Hz2
3 hours each axis +1.4%
Vibration and Shock As vibration test above +
Shock 1500g, 0.5ms 5 times, 5 axes +1.2%

Characterisation Tests
The characterisation printed circuit board for the HIGHTECS ASIC has been designed and manufactured and is shown in Fig. 19.


Fig. 19. Characterisation Board for Testing of HIGHTECS ASIC in PGA Package

The characterisation board is driven by a FPGA board. The FPGA board has been connected to the characterisation board containing the HIGHTECS ASIC in PGA package and the characterisation board has been placed into either an oven for high temperature testing up to 275oC or a chamber for testing down to -40oC. Characterisation tests have been carried out on the 1st and 2nd version of the ASIC; full details are presented in Deliverable Report D8 and a couple of example results are presented below.

The change in voltage bandgap against temperature up to 250oC and the effective temperature coefficient are shown in Fig. 20. Qfreq measurements at 25oC and 235oC are shown in Fig. 21, which do not have any temperature dependency.

Fig. 20. Voltage Bandgap change with temperature and effective temperature coefficient of 2nd version of HIGHTECS ASIC

Fig. 21. Qfreq measurements at 25oC and 235oC on 2nd version of HIGHTECS ASIC

Testing of HIGHTECS Hybrid Circuit and High Temperature PCB containing Resistors

Boxes for testing of the HIGHTECS hybrid circuit and HIGHTECS module have been designed and manufactured, as shown in Figs. 22, 23 and 24. The boxes have been designed to test the various inputs on the HIGHTECS circuit. The hybrid circuit can be mounted onto the socket and tested prior to final assembly.


Fig. 22. Test Box for HIGHTECS hybrid circuit and module


Fig. 23. Test of HIGHTECS hybrid circuit


Fig. 24. Test of HIGHTECS Module

10 off HIGHTECS hybrid circuits were tested through the application of the +ve and –ve 12V power supplies. The current limit of 270mA was reached on the –ve power supply in most of the samples. Oscillations of the ARINC 429 signal were observed on most of the samples, which required additional capacitors on the input side of the supply regulators and the +ve and –ve power supplies needed to be applied simultaneously to avoid an overload effect on the hybrid circuit.

The output from a representative HIGHTECS hybrid circuit with all sensor inputs open circuit connected to the ARINC 429 Bus Monitor User Interface is presented in Fig. 25. The red LEDs are all indicating open circuit errors as expected. The Tfo2 signal has no error message, which was as expected as no ARINC messages were generated for this sensor. T4 signal is indicating an open circuit. Nfreq and Qfreq are indicating “overrange” and DIN sensors are all showing open circuit as expected.

Fig. 25. Output from ARINC 429 Monitor from HIGHTECS Hybrid
Further work on the HIGHTECS hybrid to identify the signals required to operate the ADC correctly was undertaken, which produced near-expected outputs for the linear sensors and the frequency sensors. One HIGHTECS hybrid circuit (10514605) was assembled into a complete module and the unit has been shown to function from -40oC to +225oC, with the linearity of the SG2 sensor output improving as the temperature increases above ambient, see Fig. 26.


Fig. 26. SG2 output from HIGHTECS Module from -40oC to +225oC

Prototype SiC Transient Voltage Suppressors
Prototype SiC Transient Voltage Suppressor (TVS) devices were assembled with copper tags providing the conductor path, as shown in Fig. 27. These SiC devices can operate at temperatures of at least 200oC, which is above the temperature of commercial Si based lightning protection devices. Preliminary lightning testing has been carried out on these devices, following the procedures of DO-160E.

Fig. 27. Prototype SiC TVS devices with copper tags attached
Pin injection lightning tests following the procedures detailed in DO-160E, Section 22.5.1 were carried out at the waveforms and levels shown in Table 3 below.


Table 3. Lightning Induced Transient Susceptibility – Pin Injection Tests
Level Waveforms
3 4 5A
Voc/Isc Voc/Isc Voc/Isc
1 100/4 50/10 50/50
2 250/10 125/25 125/125
3 600/24 300/60 300/300
4 1500/60 750/150 750/750
5 3200/128 1600/320 1600/1600
Notes: Voc – peak open circuit voltage (V), Isc – peak short circuit current (A)
For Waveform 3, the frequency was 1MHz.
The prototype devices were shown to clamp successfully at the levels and waveforms highlighted in Table 3. Further work to assess leakage currents and incorporate the devices into circuits is required.
TESTING OF SOI TEST CHIP

Environmental tests have been performed throughout the HIGHTECS project on a SOI test chip fabricated using the same semiconductor process (X-FAB XI10 1µm) in the manufacture of the HIGHTECS ASIC. This test chip has been assembled into a 48 pin HTCC DIL package and subjected to various environmental tests as described below in Table 4 to identify degradation mechanisms that may occur during the lifetime of the product.

Table 4. Summary of Environmental Tests carried out on SOI Test Chip
Environmental Test Test Duration SOI Test Chip Details
High Temperature Storage (250oC) 11088 hours Batch 1 – Au/TiW metallisation, bond out options 1-6
7056 hours Batch 2 – Au/Pd/Ni metallisation, bond out options 1-6
Rapid Thermal Cycling
(-40oC to +225oC) 2680 cycles @ ~5 mins per cycle Batch 3 – Au/Pd/Ni metallisation, bond out option 7
Vibration
(Room Temperature and 200oC) Resonance
Random
Sine Batch 3 – Au/Pd/Ni metallisation, bond out option 7


High Temperature Storage (250oC)

The main limiting factor on the performance of the SOI test devices assembled in HTCC packages when exposed to temperatures of 250oC for up to 11,000 hours appeared to be the packaging materials used in the assembly process rather than the device itself. There were two principal sources for the degradation; firstly, through the formation of intermetallics between the Au wire bond and the Al metallisation on the bond pad, despite the presence of over bond pad metallisations designed to prevent diffusion of the Al metallisation, and secondly, through the deterioration of the high temperature die attach adhesive within the hermetically sealed package, which caused the formation of whiskers around the bond pads, see Fig. 28.


Fig. 28. SEM picture of unbonded bond pad of adhesive bonded SOI device after 11,088 hours exposure to 250oC showing growth of whiskers

In the case of wire bonding, Al-1%Si wire wedge bonded to the Al metallisation on the device was selected as the most stable option. In the case of the die attach, an inorganic Au-Si eutectic solder is recommended to avoid problems of deterioration of organic materials.

Rapid Temperature Cycling (-40oC to +225oC)

The following temperature profiles were provided by Turbomeca:

Profile No 1: 4 x Following Cycle
• 30 mins, power on, on ground, with stopped engine (Temperature -50oC to +50oC)
• 90 min, power on, in flight with running engine (Temperature 150oC)
• 30 mins, power on, on ground, with stopped engine (Temperature 250oC – approx. 4 mins at 250oC, with 26 mins cooling to ambient)
• 210 mins, power off, on ground, with stopped engine

Profile No 2: 2x Following Cycle
• 613 mins, power off, on ground, with stopped engine (Temperature -50oC to +50oC)
• 4 mins, power on, on ground, with stopped engine (Temperature -50oC to +50oC)
• 99 mins, power on, in flight with running engine (Temperature 150oC)
• 4 mins, power on, on ground, with stopped engine (Temperature 250oC)

The number of cycles were calculated for each profile against the specified target operating lifetime of 50,000hrs. This equates to 8,333 cycles under Profile No. 1 and 4,167 cycles under Profile No. 2. To accelerate this number of cycles in reduced time it was proposed to ramp from the minimum and maximum temperature extremes at the maximum cooling/heating rate with no dwell time at any temperature. Examples of a full day equivalent running are shown in Figures 29 and 30 for both profiles:


Fig. 29. Example of full day equivalent running for Profile 1



Fig. 30. Example of full day equivalent running for Profile 2

By having no high temperature dwell any failures due to accumulated strain (e.g. in solder joints and die attach) will be accelerated even more since there will be no opportunity afforded for annealing at temperature.

Trials have been carried out to assess the performance of SOI test chips after exposure to rapid change of temperature from -40oC to +225oC over a periodic cycle time of ~5 minutes which was the minimum cycle time that could be achieved with the equipment available, see Fig 31 for the thermal cycling equipment and Fig 32 for the temperature profile.



Fig.31. Equipment for Rapid Change of Temperature from -40oC to +225oC with 320 second cycle time




Fig.32. Measured temperature profile for rapid change of temperature with 320 second cycle time

Packaged SOI test chips were run using rapid thermal cycling and monitoring the gain of an op-amp contained within the device before and after testing. A set of 3 off samples was submitted to 2680 cycles, which represents nearly a third of the expected number of thermal cycles during the lifetime of the component for temperature profile 1 and then tested again. The results showed that little obvious change in op-amp gain was observed. Visual inspection of this sample did not show any obvious degradation.



Vibration (Room Temperature and 200oC)

Vibration testing has been undertaken to ensure that the die attach and wire bonds are not affected by any resonance effects in the sinusoidal vibration modes and random vibrations. The results of the electrical tests after vibration testing showed little difference indicating that conventional vibration testing should not be major concern to the reliability of the assembled ASIC. However vibration testing at temperature may cause additional issues and some additional tests have been carried out to assess this aspect.

SOI test devices with op-amp functional blocks were assembled into HTCC packages with 25µm diameter Au wire. The gain of the op-amps was measured prior to testing and again after random vibration testing at a temperature of 25oC and 200oC. The results showing the change in op-amp gain at test temperatures of 25oC, 125oC and 250oC indicated that there was little discernible difference in the op-amp gain between the vibration tests carried out at 25oC and 200oC.

Silicon Capacitors

Silicon capacitors supplied by Ipdia were analysed using scanning electron microscopy and energy dispersive X-Ray (EDX) analysis before and after thermal ageing at 250oC. The analysis showed that the capacitors were composed of a monolithic piece of silicon with an Al doped guard ring around the active device, with Au flashed Ni plating as the contact metallisation on the connecting pads. After thermal ageing at 250oC for 24 hours in air, the nickel on the contact metallisation has diffused through the Au metallisation and oxidised to a thickness of ~10nm of NiO.

10nF, 100nF and 1µF silicon capacitors have been incorporated into the hybrid circuit design. Thermal cycling from -40oC to +250oC of 1206 1µF silicon capacitors onto alumina substrates using a Ag loaded high temperature conductive adhesive have shown some shorting of the capacitors after less than 10 cycles. An initial investigation has been carried out, which has shown some cracking in the contact metallisation, the dielectric and the silicon. It is believed that the stress caused by thermal cycling of the surface mounted capacitors onto the alumina substrate results in the cracking of the dielectric beneath the contact pads. Alternative options for assembly have been reviewed and trials have been carried out on wire bonded versions of the Ipdia capacitors, which have shown little variation in capacitance, leakage currents and no occurrence of shorts when subjected to temperature storage at 200oC for >3500 hours and 165 cycles from -40oC to +200oC.
ACCELERATED LIFE TESTS AND LIFETIME PREDICTION

Thermal Ageing at 200oC and 250oC

Based on the temperature profiles supplied by Turbomeca, estimates of the operating lifetime expected by extrapolating results from temperature storage tests at 200oC and 250oC for 1000 hours have been made and presented in Table 5.

Table 5. Estimate of operating lifetime after extrapolation of temperature storage results for 1000 hours at 200oC and 250oC.
Temperature Profile supplied by Turbomeca Average Operating Temperature Storage Test Temperature
Test Time Estimated Lifetime
1 84.4oC 200oC 1000 hours 61 years
250oC 1000 hours 22 years
2 68.5oC 200oC 1000 hours 298 years
250oC 1000 hours 109 years

FMEA AND RELIABILITY PREDICTION

A preliminary FMEA has been carried out based on the functional block description of the design of the HIGHTECS module containing the HIGHTECS hybrid circuit and a high temperature pcb containing resistors (2).

The main failure modes that may result in undetected erroneous data being sent are improper operation of the ADC on the ASIC, the voltage regulators and drift in capacitor and resistor values.. The probability of erroneous data transmission is mainly controlled by the ability of the BIT function to flag warnings of when the various functional blocks do not function correctly.

The estimated values derived from the FMEA for the two temperature profiles provided by Turbomeca are presented in Table 6 below:

Table 6. Summary of Values Derived from FMEA on HIGHTECS Module
Factor Temperature Profile 1 Temperature Profile 2
Total failure rate for HIGHTECS Module 50.69/106 Flight hours 41.42/106 Flight hours
Mean time between failures 19,730 hours 24,143 hours
Probability of no data transmitted 15.89 x 10-6 flight hours 12.98 x 10-6 flight hours
Probability of undetected incorrect data transmission 1.57 x10-6 flight hours 1.29 x10-6 flight hours
BIT failure detection cover 91.7% 91.6%

Module Weight and Dimensions

A breakdown of the weight of the prototype HIGHTECS Module is presented in Table 7 below.

Table 7. Breakdown of Weight by Component for prototype HIGHTECS Module
Component Weight, gms
Stainless steel enclosure (exc connectors) 606
Stainless steel lid 113
Connectors 117
Mounting plate 48
High temperature pcb with resistors 48
Hybrid circuit (containing resistors) 38
Miscellaneous (washers, gaskets, etc) 16
Total 986

The target weight for the HIGHTECS module was 500gms, the actual weight was 986gms of which over 80% was accounted for by the stainless steel enclosure, lid and connectors. A significant reduction in weight of the HIGHTECS module can be achieved through selection of lighter materials (e.g. aluminium) for the enclosure and lid, although plating of the aluminium may be necessary to withstand the environment.

The target and actual dimensions of the prototype HIGHTECS module is presented in Table 8 below.



Table 8. Target and Actual Dimensions for prototype HIGHTECS Module
Dimension Target
mm Actual
mm
Length (inc connectors) 90 157.60
Width 40 64
Height 60 38.20

The actual dimensions of the prototype HIGHTECS module exceed the target dimensions, mainly on the length and width due to the currently available high temperature connectors. If miniature high temperature connectors are developed, there is scope for size reduction. Internally, the derated resistors for high temperature operation have the largest dimensions. As miniaturised high temperature resistors become more widely available, these resistors could be incorporated in the hybrid circuit.

Module Power Consumption

The target and actual power consumption of the prototype HIGHTECS module is presented in Table 9 below.

Table 9. Target and Actual Current Power Consumption for prototype HIGHTECS Module
Consumption Unit Target Actual
Power W 10 2
Current A 1 0.2

Summary

The HIGHTECS ASIC, hybrid circuit and module have been designed and manufactured. The HIGHTECS ASIC has successfully demonstrated dual output of ARINC 429 messages; however, problems have been encountered in achieving a consistent linear output in the Analogue to Digital Conversion (ADC) transfer function. The hybrid circuit and module has also produced ARINC 429 messages, but the output has been inconsistent, which again is believed to be related to the ADC transfer function. The ADC, which was supplied to the project as an existing IP block, is sensitive to its supply voltages and does not meet its published specification. The transfer function of the ADC has discontinuities present. The discontinuities reduce as the analogue supply voltage is increased above the digital supply voltage and as the temperature is increased above ambient. The voltages needed to eliminate the discontinuities are above that recommended for the SOI ASIC process. A small number of devices were identified which had a functioning ADC at a digital voltage of 5V and analogue voltage of 5.5V and these devices have been assembled into the HIGHTECS hybrid circuit and module. The results show that the HIGHTECS module can function between -40oC and +225oC, with linearity of output improving as the temperature increases. A re-spin of the ASIC design was carried out to address the issues of the inconsistent ADC functionality by bringing out separate voltage references and improving the connections around and to the ADC block. The results on the 2nd version of the HIGHTECS ASIC show the analogue sensor conditioning and frequency measurements functions in line with specification on the ASIC over the temperature range -40oC up to 250oC with operation up to 275oC. However the ADC output is not linear at 5V, which is the recommended voltage for the SOI process and further work will be required outside the scope of this project to develop an improved ADC IP block which can function at 5V.

Potential Impact:
Exploitation Planning

The four main opportunities for exploitation arising from this project are:

• ASIC device design, manufacture and test
• Multi-chip module design, manufacture and test
• High temperature electronics packaging technology
• Failure analysis, failure modes, lifetime and reliability prediction

The approach to be taken for each of these areas is described below:

ASIC device design, manufacture and test
The ASIC design teams at GE Aviation Systems – Cheltenham and GE Research – Munich will build on the lessons learnt in the development of the HIGHTECS ASIC design using the 1µm Silicon-on-Insulator (SOI) process from X-FAB for the analogue signal conditioning, ADC, logic and ARINC functional blocks to develop new ASIC designs for high temperature electronics in aerospace and other sectors. New designs may be implemented by each team working separately or jointly depending on the customer requirement.

Multi-Chip Module (MCM) design, manufacture and test
The hybrid circuit design and manufacturing team at GE Aviation Systems – Newmarket will implement the manufacturing procedures developed in the assembly of the HIGHTECS hybrid circuit to incorporate ASICs and other active high temperature components, passive devices (capacitors, resistors), oscillators and lightning protection devices onto a ceramic substrate and enclosed within a metal package for other high temperature applications.

High temperature electronics packaging technology
The experience gained on high temperature electronics packaging will be applied by GE Aviation Systems – Newmarket in the manufacture of high temperature electronics modules. The initial focus will be on sensor signal processing applications, which will then be expended upon to other high temperature modules including power conversion and switching products.

Failure analysis, failure modes, lifetime and reliability prediction
The failure analysis work and lifetime/reliability prediction studies carried out in the HIGHTECS project by Oxford University and GE Aviation Systems – Newmarket will act as a pre-cursor for further refinement of the methodologies developed for other high temperature electronics applications. Particular emphasis will be placed upon generating real lifetime data and calculating activation energies to enable models to be verified for accurate lifetime prediction based on accelerated tests.

Foreground Developed Within HIGHTECS Project

ASIC Device Design, Manufacture and Test

The HIGHTECS SOI ASIC developed includes the following schematics:

• Class AB NMOS input operational amplifier
• Class AB PMOS input operational amplifier
• Class AB rail to rail operational amplifier
• Instrumentation amplifier
• NMOS input comparator
• PMOS input comparator
• Band-gap voltage reference cell
• Voltage to voltage converter
• Voltage to current converter
• Bias cell
• Current mirrors
• Single ended to differential converter
• ADC
• ARINC 429 drivers
• DIN input
• Logic

These schematics have been implemented on the XFAB SOI XI10 process.

Multi-Chip Module Design, Manufacture and Test

The HIGHTECS hybrid circuit has integrated the following components onto a thick film printed alumina substrate:

• HIGHTECS ASIC
• Interposer substrate
• Voltage regulators
• Precision resistor
• Clock oscillator
• High temperature resistors
• High temperature capacitors
• Prototype SiC TVS devices

High Temperature Electronics Packaging Technology

Die attach and interconnection technologies have been developed for high temperature applications, where test SOI devices have been submitted to 13,000 hours exposure at 250oC. Manufacturing routes to achieve stable performance at high temperature have been identified.

Failure Modes, Lifetime and Reliability Prediction for High Temperature Electronics

Failure Modes and Effects Analysis (FMEA) and Reliability Prediction methodologies have been applied to the HIGHTECS high temperature electronics circuit using practical failure rate data and extended predictions based on MIL-HDBK-217.

Consortium Roles

GE Aviation Systems will lead the effort to promote the high temperature design, manufacture and test capability to interested parties within the EU Clean Sky partners and within GE. Specific applications work will be undertaken to design, develop and verify high temperature electronics solutions.

GE Research – Munich will continue to develop an understanding of the fundamental design aspects of SOI ASIC design and design specific functional blocks for high temperature applications.

Oxford University Materials will develop their capabilities for failure analysis and reliability prediction for high temperature electronics. They will also facilitate networking within the high temperature electronics community.


Predicted Market Value and Growth

An assessment of the market for high temperature electronics has been completed as part of the HIGHTECS project – a summary of this assessment based in terms of number of high temperature electronic units required is presented in Table 6, broken down into the following market sectors;

Aerospace
Oil & Gas
Geothermal
Automotive

The assessment indicates that the dominant market for high temperature electronics in terms of quantities over the next 8 years will be in the automotive sector for hybrid vehicles, with an increasing contribution from electric vehicles. Whilst the production quantities are more attractive in the automotive sector, the niche sectors of aerospace, oil & gas and geothermal will be the prime focus for exploitation arising from the HIGHTECS project.

For the purposes of this version of the exploitation plan, the figures presented in the quantification of the commercial returns are based on the market projections for the oil and gas, geothermal and aerospace sectors. Further work on the potential for the automotive sector will need to be considered by the project partners as their high temperature capabilities are developed and exploited.

Quantify Commercial Returns

This business plan is built on the assumption that a supply chain to service the identified markets will be established through the provision of custom electronic modules (ASICs and hybrids) into high temperature electronic systems. The exploitation of the results of the project by individual HIGHTECS project partners will be in the provision of different products and services as described in the summary of expected deliverables section. The following information has been produced as a guide by the HIGHTECS project team and is for indicative uses only. The information does not represent the official view of the individual HIGHTECS project partners.

For the purpose of the business plan only the HIGHTECS module is considered as the saleable product. There will be opportunities for the sale of ASICs and hybrids, but these are not included at this stage in the plan. The preliminary price of the complete HIGHTECS module is estimated to be £2,380. Further refinement of the price will be made as specifications become more defined and quantities increase.

Business case summaries have been produced, for the “pessimistic – 5% market penetration”, “realistic – 10% market penetration” and “optimistic – 20% market penetration” and scenarios of the oil & gas, geothermal and aerospace market sectors. From these summaries the following key business indicators have been highlighted for the three scenarios:

Key Business Indicator
(Market Penetration) Pessimistic
(5%) Realistic
(10%) Optimistic
(20%)
IRR - % -17 24 153
NPV @13.6% - £k -189 91 1410
Payback - years >10 7 3

These preliminary figures indicate for the estimated custom electronic module products that a >10% market penetration of the non-automotive market needs to be achieved in order to make the business viable within a 7 year timeframe.

The potentially higher quantities of the automotive applications need to be addressed separately in order to make a sustainable business in high temperature electronics markets, which is outside the scope of this business plan.




Table 6. Estimated World Market for High Temperature Electronics






Impact

Environmental

• Lower Emissions – CO2 Reduction by 15-20%

For the aero-engine market, the extended high temperature electronics capability will facilitate the implementation of distributed architectures, where smart actuators and sensors can replace (or off-load) the centralised control electronics. Up to 500 conductors are currently used for interfacing between jet engine sensors, actuators, flight control computers and the centralised FADEC. The application of distributed architectures could reduce the conductor count from 500 to 8 for duplex control, offering cable and harness weight saving, connector pin reduction, fault reduction and a simpler FADEC. (Ref: Shrimpling P “Advances in High Temperature Electronics for Aerospace Critical Control Applications and its Application to Conventional Electronic Challenges” TRW Aeronautical System, DTI-CARAD HiTEAM 2 Project.) This type of electronic unit would be installed inside the actuator or sensor housing and would consist of the sensor signal conditioning electronics, A/D converters, multiplexers and a serial interface bus.

At present, long, high-temperature mineral insulated (MI) or fibre-optic cable is required to connect the sensor to the electronics located in a more benign region of the gas turbine. Electronics co-located with the sensor will lead to a reduction in associated cabling, connectors, and terminals leading to reductions in weight and parts count (hence cost). The development of MEMS sensors with electronics integrated onto a multi-chip module could also lead to significant enhancement of performance at reduced costs. Moreover, the ability to perform signal handling/conditioning prior to engine control unit (ECU) will have benefits in terms of enhancing the data available for engine health monitoring. For example, temperature signals from thermocouple arrays be must averaged prior to sending the signal to the ECU as weight restrictions do not allow for individual cables from each thermocouple to be relayed to the ECU. The use of a multiplexing systems that can withstand engine casing temperatures (~25C) would allow indvidual thermocouple signals to be analysed by the ECU off a single cable harness. This could permit the detection of engine hotspots, radial distortions in temperature and condition monitoring of individual thermocouples.

Managing engine performance is receiving a greater amount of attention for safety, reliability and fuel burning savings (Ref: J W Ramsey, Engine Indications, Avionics Magazine, November 2008). Advances in heat resisting sensors and the desire to use full authority digital control electronics (FADEC) and engine health monitoring systems (EHMS) near to the sensing element is accelerating the interest in the use of high temperature electronics. This is leading to the development of “intelligent sensors”, which incorporate high temperature electronics in the sensor itself and have the capability to perform self-diagnosis of their health. The output of the “intelligent sensor” will be a digital signal which is then fed into the FADEC. The reduced need for processing of analogue signals within the FADEC unit can increase the capacity for incorporating the EHMS within the same unit, saving weight, space and costs.

For the aerospace market, improved sensor technology will have significant benefits in a number of areas. Firstly, although sensor weight may be small relative to the total weight of the aircraft, any improvements that could be achieved through reductions in lead-outs, terminals, connectors, etc. can still have a tangible impact on fuel consumption and running costs. For example, weight savings of even a few kilos can result in hundreds of thousands of pounds in annual fuel saving. Secondly, improved engine monitoring capability should result in engines being run at conditions for more optimal thermodynamic efficiency, resulting in reduced fuel consumptions (and engine emissions) and potentially increased component life. Moreover, improved sensor performance could lead to a reduction in maintenance costs through “smart scheduling” of servicing and overhaul based on reliable and indicative sensor data and not on fixed flight hour intervals.


• To reduce external noise by ~20dB

The HIGHTECS project will also lead to a reduced specification for the cooling system as the electronics will operate at higher temperatures and the flow in the tubing system will be less turbulent, leading to a direct impact on cabin noise and passenger comfort.

The estimated total world requirement for high temperature electronics modules is summarised in the table below for different airborne sectors.

Socio-economic

Integrating European Industry

GE is a multi-national organisation with a considerable presence in Europe. GE Aviation Systems Ltd in the U.K. (and GE Research Centre in Germany) already supply the European aerospace industry and are committed to supporting European initiatives. Oxford University is renowned as a European centre for high temperature electronics research and attracts students from several European countries. The work undertaken in HIGHTECS will enhance the research and development capabilities for the European aerospace industry, extending the scientific and technological bases which underpin the competitiveness in this sector.

Open Access to SMEs and New Member States

The project will utilise selected SMEs for the supply of specialist materials for packaging of high temperature electronics. Involvement of SMEs during the project will increase their awareness of the future requirements of high temperature electronics for the aerospace sector and allow them to direct their product development effort towards servicing this growing market.

Partners from New Member States are not directly involved in this project. The team will seek to engage with ongoing complementary work in New Member States through collaboration during the course of the project.

Multiplier Effect

HIGHTECS will take advantage of the research conducted in the UK Technology Strategy Board project UPTEMP, which is due to be completed early in 2010. This work has developed some of the basic understanding of electronic packaging materials performance under long term operation at 250oC.

Competitive European Industry

The project consortium can provide high temperature electronics platforms without the reliance on U.S. products. The capability will be able to service European requirements for engine control, with the added benefit of being applicable to other sectors such as energy and down-well, making the pricing more competitive with the associated increase in quantities. The expertise in electronic design and electronics packaging developed in the course of the project will be European based and successful exploitation will maintain a highly qualified workforce in Europe.

Sustainable Growth

The demonstration of the high temperature electronics platform will contribute to the overall reduction in CO2 emissions and noise targets set by ACARE.



Dissemination Plan

Support of EU Clean Sky Joint Undertaking

Demonstration Electronics

A prototype HIGHTECS module connected to an ARINC 429 output reader device will be available for demonstration to interested EU Clean Sky Partners.

Presentation of Results to EU Clean Sky Partners

A presentation of the results achieved within the HIGHTECS project will be prepared and will be available for presentation to interested EU Clean Sky partners. An abstract entitled “Development of High Temperature Electronic Modules for Aero-Engine Control Systems” has been submitted to the International Conference on Greener Aviation, Brussels, 12-14 March 2014.

Publication of Results

Technical Conferences

Selected results from the HIGHTECS project will be published at specific high temperature electronics conferences (e.g. HITEN in Europe) and wider electronics conferences (e.g. IMAPS) after approval by the HIGHTECS partners in accordance with the terms of the Collaboration Agreement. An abstract entitled “Design of a High Temperature Signal Conditioning ASIC for Engine Control Systems” will be submitted to ISCAS (International Symposium on Circuits and Systems) 2014, Melbourne 1-5 June 2014.

Publicly Available Information

The broader impact of the results achieved from the HIGHTECS project will be published through approved press releases and selected information will be made available on the web.


List of Websites:
The contact relating to dissemination of the results from the HIGHTECS project should be addressed through:

Steve Riches
GE Aviation Systems – Newmarket
351 Exning Road
Newmarket
Suffolk
CB8 0AU
United Kingdom
T: 44 1 638 675 617
E: steve.riches@ge.com