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Content archived on 2024-04-16

A Multiscalar Supercomputer

Objective

This project aims to develop the industrial prototype of a multiscalar high-performance computer. This requires the design of new architectural concepts at both the component and system levels, as well as closely related software design and development at the compiler and operating system levels. AMUS continues the feasibility study carried out under the HSSC project (2703).
The project aimed to develop the industrial prototype of a multiscalar high performance computer. This required the design of new architectural concepts at both the component and system levels, as well as closely related software design and development at the compiler and operating system levels.
The architectural concepts of the multiscalar component have been designed and validated by simulation. The system architecture has been designed, and the software requirements specified. The project is now ready to move forward to the next phase: design of multiscalar chips, integration in a multiprocessor architecture, and software (mainly compilers) design.
A one-year definition phase aims to study and design a multiscalar component, define a system architecture for a high-performance computer, and evaluate and select the software needed to program and exploit this multiscalar architecture.

The architectural concepts of the multiscalar component have been designed and validated by simulation. The system architecture has been designed, and the software requirements specified. The project is now ready to move forward to the next phase: design of multiscalar chips, integration in a multiprocessor architecture, and software (mainly compilers) design.

Topic(s)

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Call for proposal

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Funding Scheme

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Coordinator

Advanced Computer Research Institute
EU contribution
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Address
1 boulevard Marius Vivier-Merle
69443 Lyon
France

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Total cost
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Participants (7)