Final Report Summary - LEPTON UNIVESALITY (Precise test of Lepton Universalty with decays of the charged kaon at the NA62 experiment at CERN)
The aim of the project was the upgrade of the CEDAR detector (a Cherenkov particle tagger) for the operation in a very high intensity beam at the NA62 experiment at CERN, the flagship of the near-future European kaon research programme. This crucial part of equipment is essential for the experiment to reach an unprecedented precision, and opens a range of new possibilities to probe indirectly the nature of new physics at the TeV energy scale, including Lepton Universality tests at record sensitivity. The project involved the development and tests of electronics, data acquisition, monitoring and detector simulation tools, and optimization of the detector performance.
The TEL62 data acquisition circuit board (which in an adaptation of a board developed for the LHCb experiment at the LHC collider at CERN) is employed for the CEDAR electronic read-out. The full readout chain involving a light-emitting diode (LED), a photomultiplier (PMT), a preamplifier, a Time-Over-Threshold NINO board, a Time-to-Digital-Converted (TDC) and a TEL62 board plus a data acquisition PC was set up and tested in order to identify the limitations of the system in terms of maximum signal rate. The TDC to be used the data taking was tested together with TEL62 board with 40 MHz and 80 MHz internal clock. Testing the TDC at 80 MHz clock necessitated an upgrade of TELL1 firmware. The rate tests have been conducted with both regular pulses and randomly generated pulses (the latter simulating asynchronous arrival of kaons). The preamplifier designed for the high radiation environment was found to be too noisy and caused loss in time precision. As a consequence of the test, the decision to remove preamplifier, and connect PMTs directly to NINO with a differential cable was taken. Further tests were performed and it has been demonstrated that the readout chain works correctly in this mode. The other major result of these studies is the confirmation that at the signal rate of 3–5 MHz per channel (as expected from detector simulations) the readout inefficiency is very small or negligible, thanks to adopting a 80 MHz clock.
The developed readout hardware, as well as the event reconstruction and online monitoring software have been designed and largely integrated into the general NA62 framework. The CEDAR detector performance has been studied during a test beam at CERN carried out in September 2011. A set of photodetectors of the modern type to be used by the NA62 experiment, and the full chain of the new fast electronics and the new data acquisition and event reconstruction software has been tested and validated, which allowed a successful measurement of light collection efficiency by the new PMTs during the test run.
A detailed model of the CEDAR detector based on the GEANT4 simulation package has been developed, and fully integrated into the software framework of the NA62 experiment. The simulation has reached a high level of detail, including precise geometry description, measured transmittances of lenses and reflectivities of the mirror and cone surfaces, and quantum efficiencies of the photomultipliers. A realistic digitization code was developed to model the performance of the photodetectors. A package allowing to run fast CEDAR performance studies in a stand-alone mode has been deigned, to enable the performance and behaviour of the detector to be simulated and optimized following the hardware tests.
The TEL62 data acquisition circuit board (which in an adaptation of a board developed for the LHCb experiment at the LHC collider at CERN) is employed for the CEDAR electronic read-out. The full readout chain involving a light-emitting diode (LED), a photomultiplier (PMT), a preamplifier, a Time-Over-Threshold NINO board, a Time-to-Digital-Converted (TDC) and a TEL62 board plus a data acquisition PC was set up and tested in order to identify the limitations of the system in terms of maximum signal rate. The TDC to be used the data taking was tested together with TEL62 board with 40 MHz and 80 MHz internal clock. Testing the TDC at 80 MHz clock necessitated an upgrade of TELL1 firmware. The rate tests have been conducted with both regular pulses and randomly generated pulses (the latter simulating asynchronous arrival of kaons). The preamplifier designed for the high radiation environment was found to be too noisy and caused loss in time precision. As a consequence of the test, the decision to remove preamplifier, and connect PMTs directly to NINO with a differential cable was taken. Further tests were performed and it has been demonstrated that the readout chain works correctly in this mode. The other major result of these studies is the confirmation that at the signal rate of 3–5 MHz per channel (as expected from detector simulations) the readout inefficiency is very small or negligible, thanks to adopting a 80 MHz clock.
The developed readout hardware, as well as the event reconstruction and online monitoring software have been designed and largely integrated into the general NA62 framework. The CEDAR detector performance has been studied during a test beam at CERN carried out in September 2011. A set of photodetectors of the modern type to be used by the NA62 experiment, and the full chain of the new fast electronics and the new data acquisition and event reconstruction software has been tested and validated, which allowed a successful measurement of light collection efficiency by the new PMTs during the test run.
A detailed model of the CEDAR detector based on the GEANT4 simulation package has been developed, and fully integrated into the software framework of the NA62 experiment. The simulation has reached a high level of detail, including precise geometry description, measured transmittances of lenses and reflectivities of the mirror and cone surfaces, and quantum efficiencies of the photomultipliers. A realistic digitization code was developed to model the performance of the photodetectors. A package allowing to run fast CEDAR performance studies in a stand-alone mode has been deigned, to enable the performance and behaviour of the detector to be simulated and optimized following the hardware tests.
