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Methodology and supporting toolset advancing embedded systems quality

Final Report Summary - MODUS (Methodology and supporting toolset advancing embedded systems quality)

Executive Summary:
MODUS has applied and advanced state-of-the-art technologies to develop a set of methodologies and tools advancing embedded systems quality by enabling effective model verification, easy interfacing with standards for HW/SW co-simulation, model-level performance optimisations, and customisable source-code generation. In relation to the shortcomings of existing tools and approaches, MODUS advances the technological progress through the following innovative activities:
• A HARMONISED METHODOLOGICAL AND TOOLING FRAMEWORK.
The project provides a harmonised methodological and tooling framework for model verification, HW/SW co-simulation, performance optimisation, and customisable source-code generation, without placing restrictions on the use of FDTs and modelling languages. The MODUS framework is centred on the definition of a Language Neutral Representation (LNR) for event-based systems, which is used as the intermediate format for interfacing with external tools and platforms. Advanced features as system-logic and architecture transformations for interfacing with different tools and platforms and optimising system performance, as well as system model analysis for selecting/customising model verification strategies, are performed at the LNR model level, before generating the outputs to external tools and target platforms. It should be stressed though that the LNR format is hidden from the users of the tools. In fact, they are provided with the means to develop high-quality implementations by using their favourite Formal Description Techniques (UML, SDL, Simulink, LUSTRE, etc.).

• EFFECTIVE EXPLOITATION OF EXISTING MODEL VERIFICATION TECHNIQUES

MODUS allows the effective exploitation of existing model verification techniques that are currently dispersed across different modelling frameworks and tools. As explained in Section 2, formal model verification features are incorporated in a limited set of CASE tools for use with specific modelling languages. On the other hand, there exist many stand-alone formal model verification tools but these are highly specialised and do not adopt harmonised modelling approaches. In this context, MODUS does not merely provide a front-end to existing tools for formal model verification. It has further developed a tool that guides the selection of the underlying model verification techniques to be used, through the automated analysis of the input system models and properties to be verified.

• FORMAL REPRESENTATION OF CODING STANDARDS/CONVENTIONS AND AUTOMATIC GENERATION OF CODE.
MODUS provides a methodology and tool for the formal representation of coding standards/conventions and the automatic generation of code that complies with them. As already mentioned, the code generation strategies of popular CASE tools are not sufficiently customisable. On the other hand, the customisation of open-source model-driven code generation tools is very time-consuming as it is based on the use of complex and not standard programming interfaces. As a consequence, in practise software developers have to manually reorganise the source code generated by CASE tools in order to comply with customer-/project-specific coding standards. MODUS has defined a formalism for the effective modelling of coding standards/conventions and has developed a tool for the customisable generation of code that respects these formal representations. This enables software developers to automatically acquire high-quality source code without needing to repeatedly and manually apply the coding rules on the source code generated by CASE tools.

• PERFORMANCE OPTIMISATION APPLICABLE ACROSS DIFFERENT TARGET PLATFORMS.
The project has developed a methodology and tool for performance optimisation that facilitates the improvement of the algorithmic complexity of software designs and is applicable across different target platforms. Present code optimisers are for use with specific programming languages and platforms. Moreover, they are confined to relatively “shallow” performance improvements that are applicable to small system parts. The MODUS provides a code optimisation approach that is based on transformations performed at the Language-Neutral-Representation (LNR) model level. It makes use of patterns for identifying and applying applicable transformations relating to the control-flow complexity (state-transition logic) and data-flow complexity (algorithms and processing taking place within states) of a software system, rather than just rewriting small code blocks in a source-code implementation. This is achieved through the exploration/analysis of the LNR models by using formally represented rules for identifying design patterns for which optimisation-related transformations apply. Up to now the use of formally represented design patterns has been confined in the context of formal model checking/verification techniques but has not been applied for the purposes of performance-tuning transformation. The MODUS approach provides significant benefits by facilitating the improvement of the algorithmic complexity of software designs. In addition, through the use of the MODUS code generation tools, it allows the easy derivation of optimised source code for different target platforms

Project Context and Objectives:
Software quality is of primary importance in the development of embedded systems, often used in safety-critical applications. Moreover, as the life cycle of embedded products becomes increasingly tighter, productivity and quality are simultaneously required and closely interrelated towards delivering competitive products. Incorporating FDTs into the SW development process remains the most widely-used approach for improving software quality. Further to this, the use of CASE tools for the transformation of FDT specifications/models into software quality implementations is widely used in order to improve productivity. Presently, the embedded systems industry has invested in a large variety of (domain-specific) FDTs and CASE tools (each of them typically confined for use with a limited set of FDTs). Despite the extensive use of FDTs and CASE tools, industrial experience has shown that software quality for embedded systems still remains a significant challenge. This is mainly due the following limitations of existing CASE tools:
• Inadequate support of formal model verification features towards identifying design deficiencies in terms of safety/liveliness and real-time operation. Formal model verification features have been incorporated only in a limited set of CASE tools. However, these tools are confined to just a few FDTs and model verification methodologies. On the other hand, there exist many stand-alone formal model verification engines covering a wide range of model verification requirements, however they have not been adopted by the industry since they are highly specialised and cannot interface with today’s popular CASE tools.
• The currently available CASE tools do not support interfaces to standards used for HW/SW co-simulation, such as SystemC, towards allowing the effective identification of design deficiencies in terms of HW/SW interfacing.
• Inadequate support of features for automated performance-tuning optimisation for handling trade-offs between memory utilisation, speed, power consumption, etc. Such features are presently tailored for use with specific programming languages and target platforms. Moreover they do not deal with the algorithmic complexity of software systems but rather with “shallow”, low-level source-code transformations.
• The code generation strategies of existing CASE tools are not customisable for generating code that respects coding standards other than the ones that they have been originally designed for. Such coding standards (e.g. ARP 4754, DO-178B, etc) may relate to source-code implementation aspects as complexity, readability, maintainability, safety etc.

In particular, the growing group of European SMEs that are active in the sector of embedded systems development in various application domains (avionics, automotive, consumer electronics, telecoms, etc) are in great need of effectively adopting such techniques advancing quality and productivity. However, due to the identified limitations of present tools, the effective utilisation of these enablers would in general imply that:
• SMEs may need to take a departure from their existing development practices and invest in new ones (e.g. the use of different FDTs). In this sense, SMEs may not be able to preserve existing investments in technical know-how and tools for the use of FDTs in the software development process.
• Even in the cases that SMEs have achieved to successfully adopt enablers as automated model verification, HW/SW co-simulation, and performance-tuning optimisations, they meet difficulties in adapting them to different customer requirements that may require the use of new FDTs, target platforms, coding standards, etc.

The present situation has proven to favour large embedded system development companies against SMEs. This is because the former can more easily afford investing in new FDTs, or having the associated tools customised to their existing practices. In addition, large players inherently have the resources and know-how to apply expensive Total Quality Management (TQM) methods and iterative quality/design/development cycles. In this context, the MODUS project provides a pragmatic and viable solution that allows SMEs to substantially improve their positioning in the embedded-systems development market. The project developed and validated a set of technical methodologies, as well an open and customisable toolset, advancing embedded systems quality when using Formal Description Techniques (FDTs), by enabling:
• Model verification by guiding the selection of existing open-source model verification engines, based on the automated analysis of system properties, and producing inputs to be fed into these engines.
• Interfacing with standard (SystemC) simulation platforms for HW/SW co-simulation.
• Software performance-tuning optimisation through automated design transformations.
• Customisable source-code generation towards respecting coding standards and conventions.
In addition, the project provides methodologies and open interfaces for customising and extending the MODUS toolset for use with different (domain-specific) FDTs, modelling practices, programming languages, target platforms, etc. MODUS is not competitive with the vendors of CASE tools that are presently used in embedded software engineering. On the contrary, the MODUS toolset allows the adoption of quality strategies by complementing these tools and preserving existing investments in technical-know.
Towards this direction, the MODUS toolset integrates the model verificaTion and HaRdware/Software co-sImuLation tool (TRIAL) and the Performance opTimisation and cUstomisable source-code geNEration tool (TUNE). Embedded software is increasingly incorporated in safety-critical systems that are required to satisfy reliability, availability, maintainability, and safety (RAMS) objectives. MODUS is highly relevant to the RAMS principles. Specifically, the project investigates and develops effective formal model verification techniques (incorporated in the TRIAL tool) ensuring that a system has been designed to function as specified under all possible specified conditions, which directly relates to ensuring system reliability, and increasing system availability. In addition, the TUNE tool allows the customisable generation of code adhering to given coding standards, which directly improves software maintainability and indirectly leads to more reliable and safe systems. It should be also noted that the MODUS approach is directly applied and validated in applications domains (aircraft and automotive systems) with strict requirements in terms of RAMS. To this end, the project provides a thorough analysis on how the MODUS methodologies can be applied in a systematic manner towards achieving RAMS objectives.

Project Results:
MODUS designed and developed a set of methodologies and tools for model verification, HW/SW co-simulation, and customisable code generation.

INFRASTRUCTURES FOR INTERFACING WITH EXISTING TOOLS
The project has firstly developed the tooling infrastructure that allows the effective interfacing with existing tools and platforms. The development of the MODUS framework for model transformation and code generation involved the accomplishment of the following objectives:
• Definition of a language neutral representation (LNR) for the generic modelling of event-oriented systems. LNR is used as the intermediate format for generating different types of system representations, i.e. inputs to model verification engines, inputs to HW/SW co-simulation engines, and optimised source-code system implementation that respects coding standards/conventions. By using a standard intermediate format, any model transformation or code generation strategy will rely on inputs in the same formalism (LNR). The definition of the LNR is based on a thorough analysis of the behavioural concepts and date types of a wide range of potential input FDTs / modelling languages (UML, SysML, SDL, LUSTRE, etc), as well of the potential output modelling/programming languages (Promela, IF, SMV, C, Ada, etc.).
• Definition of the strategies for the generation of LNR system representations from FDT-based system models. The concepts and structure of the language, in which the system/model is implemented, have to be known by the LNR generator. The input system/model is parsed (based on the appropriate model parsing profile as shown in Figure 1) and the characteristics of the input language are appropriately categorised.
• Definition of the strategies for model transformation. Both the input and output models of the LNR model transformation engine are in the LNR formalism. In the context of the MODUS approach, model transformation serves two main purposes: Model transformations applied at the LNR-model level (e.g. data-flow optimisations, loop optimisations, etc.) towards optimising the system runtime performance. Formal refinement of system models for adding information (e.g. timing properties, platform information) is used for the representation of system properties for different types of model verification and simulation engines.
• Definition of the strategies for code generation. A technique was defined for the generation of code in different modelling/programming languages using as inputs the LNR-based system models. These mechanisms provide the front-ends to different tools and platforms. They are also responsible for enforcing non-functional coding rules as naming conventions, addition of comments, file organisation, etc. Code generation relies on the use of code generation patterns (templates) that are based on state-of-the-art languages used for such purposes (e.g. ATL, TXL, Stratego/XT, CIL, etc).

TOOL FOR MODEL VERIFICATION AND HW/SW CO-SIMULATION
The MODUS framework for model verification and HW/SW co-simulation removes the need for software engineers to deal with the implementation details of the modelling languages used by existing model verification engines (e.g. Promela, IF, SMV, LTL) and HW/SW co-simulation platforms (SystemC). The implementation of the relevant tools will exploit the LNR-based model transformation and code generation tool. The model verification and HW/SW co-simulation tools are used in conjunction with existing modelling environments / CASE tools. The MODUS tool for model verification and HW/SW co-simulation supports the following key features:
• Automated generation of system representations in the formalisms used by existing model verification engines and HW/SW co-simulation platforms from system models in different FDTs / modelling languages.
• User friendly modelling of system properties (temporal logic expressions) will be verified by means of model checking, without needing to deal with the multitude of relevant property languages (e.g. PCTL, PLTL, CTL, etc) used by existing model checking tools.
• Interactive control of model verification and HW/SW co-simulation strategies by the user through the analysis of the characteristics of the automatically generated LNR system models in relation to the model verification / simulation requirements. For instance, this feature will allow the selection of a model checking tool (and relevant target formalism) that better deals with the large size of a system as compared to others, or it is more appropriate for the verification of specific aspects (e.g. timed properties).

The development of the MODUS framework for model verification and HW/SW co-simulation involved the accomplishment of the following objectives:
• Analysis of the features of existing model checking tools (SPIN, NuSMV, Uppaal, EmbeddedValidator, etc) and development of a relevant knowledge base.
• Definition of a methodology for the GUI-based modelling of system properties to be verified by means of model checking.
• Definition of the strategy for the automated analysis of generated LNR system models in relation to model verification and HW/SW co-simulation requirements, and the interactive control of the relevant strategies based on the contents of the knowledge base.
• Prototype development of the TRIAL tool including the development of the libraries of Model Transformation Patterns and Code Generation Patterns for automatically generating the inputs to existing model verification and HW/SW co-simulation platforms.
• Design and development of the module allowing the analysis of generated LNR system models in relation to model verification and HW/SW co-simulation requirements, and the interactive control of the relevant strategies.
• Design and development of the GUI for the user-friendly modelling of system properties under verification.

TOOL FOR PERFORMANCE OPTIMISATION AND CUSTOMIZABLE SOURCE-CODE GENERATION
The MODUS approach to source-code generation combines the automated organisation of source code according to coding conventions/standards, with the optimisation of system performance. In detail, performance-tuning optimisations are related to the provisions made for optimising system performance and/or handling trade-offs between memory utilisation, speed, power consumption, etc, by applying transformations as data-flow optimisations, loop optimisations, etc. Coding conventions/standards are related to a wide-range of source-code implementation aspects as complexity, security, readability, maintainability, etc. The MODUS tool for performance-tuning optimisation and customizable source-code generation supports the following key features:
• Assisted design optimisation for meeting performance requirements, through the iterative, automated analysis of the generated LNR models and the identification of applicable optimisations.
• Formal modelling of coding conventions/standards using a formalism that will defined within the project. Moreover, checking and identification of conflicts between the specified coding convention/standard rules towards allowing the user to provide consistent specifications.

The development of the MODUS tool for performance-tuning optimisation and customizable source-code generation involved the accomplishment of the following objectives:
• Definition of the strategies for applying different types of design optimisations. This will involve the mapping of the identified types of optimisations to “low-level” model transformation patterns represented in the selected “low-level” code transformation language (e.g. ATL, SmartQVT, Kermeta, etc).
• Definition of the strategies for the automated analysis of generated LNR models and discovery of applicable optimizations. These strategies will involve the processing of the generated LNR models for finding the system blocks that each candidate optimisation may apply for. This will be achieved through the exploration/analysis of the LNR models by using formally represented rules for identifying design patterns for which optimisation-related transformations apply.
• Analysis of existing coding standards and widely-adopted coding conventions (e.g. ARP 4754, DO-178B, etc).

MODUS TOOLSET TECHNICAL SPECIFICATIONS
In the following sections, an overall description of the MODUS toolset technical specification is provided by giving a detail description of the MODUS tool components in terms of functional specifications, architecture, interfaces and deployment features.

MODUS INFRASTRUCTURE FOR INTERFACING WITH EXISTING MODELLING LANGUAGES
One of the main goals of the MODUS project has been to incorporate different Formal Description Techniques (FDTs) that are widely-used into the software development process of embedded systems (e.g. UML, SysML, etc.) towards the definition of a language neutral representations (LNR) of the input models. The LNR represents a standard intermediate format which facilitates the model transformation for generating different types of system/software representations to modelling/programming languages (e.g. Promela, C, SystemC, etc.) for model verification, source code generation or HW/SW co-simulation.The implemented infrastructure for interfacing with existing modelling languages is based on a model transformation module. The model transformation module includes two main components: the Model Parser and the Generator. The Model Parser parses the different FDTs models based on a library of model parsing profiles. The library of model parsing profiles is extendable and includes the description of behavioural concepts and data types according to FDTs input models. The Generator generates the LNR representation of the input model according to specified transformation patterns that correspond to the mapping of input models concepts to the defined LNR language. Based on the initial analysis of the state-of-the-art review of existing technological requirements and SMEs’ development strategies from different application domains, UML has been identified as the main modelling language for a wide range of applications/systems in different sectors. The Unified Modelling Language (UML) is a standardized general-purpose modelling language in the field of object-oriented software engineering created by the Object Management Group. UML has become the industry standard for modelling software-intensive systems and includes a set of graphic notation techniques to create visual models of object-oriented software-intensive systems. UML is used to specify, visualize, modify, construct and document the artefacts of an object-oriented software-intensive system under development. Towards the definition of a common formalism for the transformation of the input modelling languages, UML language and its extensions (i.e. modelling languages that reuse UML’s concepts in terms of stereotypes, definitions, constraints, diagrams etc.) like SysML and UML MARTE are considered as the starting point of LNRs specification. Thus, in the context of this project, UML-based input models were considered for the initial specification of the separate functionalities of the MODUS toolset below.

FORMAL MODEL VERIFICATION
The Formal Model verification functionality of the MODUS toolset provides the user with the means for performing the formal validation of the system designed. The interface that users interact with, has been integrated with Eclipse IDE providing an environment in which a lot of developers are familiar with. A wizard-like menu system has been implemented in the MODUS toolset where information required for formal verification and validation can be provided by the user. This information includes:
• description of the system,
• preferences for the formal modelling language,
• properties to be verified (described in a syntax coherent with the modelling language used for the formal verification).

Major part of the interfacing with the user has been realised within the Eclipse modelling framework (depicted by the Eclipse block). The input i.e. the UML diagram of the system to be verified can be created or modified, and provided from the Papyrus model editor.

HW/SW CO-SIMULATION
The HW/SW co-simulation module is made of two elements:
• The SystemC/TLM2.0 model and XML model description file Engine. This element generates the SystemC/TLM2.0 architecture of a virtual platform, taking as input a UML MARTE HRM/HwLogical model. To be more precise, the subset of the model used by the element is the Component Diagram. Along with the SystemC model, a XML model description is generated (useful for the second element of the module). In order to implement this functionality, a generic code generation engine is used: the Acceleo Code Generation Engine to generate SystemC/TLM2.0 and XML. Two specific Acceleo modules have to be designed: one for SystemC/TLM2.0 generation, one for XML generation. This element will mainly be based on specific generation scripts and templates, and will be provided as an Eclipse plugin.
• The Platform Configuration Tool. This tool generates the SystemC/TLM2.0 virtual platform, ready for simulation, taking as inputs the SystemC/TLM2.0 architecture and the XML description file generated by the previous element, a set of SystemC/TLM2.0 IP models, and a set of executable binaries. In addition, it provides a front-end interface for MODUS’ users. This graphical interface helps the users: in managing the SystemC modules’ skeletons in which to manually include their IPs, in managing the SystemC modules corresponding to the memory components in which to manually link their executable binaries, and in setting the simulation-relevant parameters. The XML description file summarizes the information related to the configuration, and is extensively used by this module. This module is provided as an Eclipse plugin.

CUSTOMIZABLE SOURCE CODE GENERATION.
The modelling concepts of the input models that will be implemented by the code generation mechanism have to be identified. For each of these modelling concepts, the implementation strategy and the properties of the code generation that can be customized by the end-users is defined. Specific parameters (customisable properties) can be defined by the end user in order to select or control the target language implementation for every semantic. The code generation module will include two main components: a graphical interface for the configuration of the generator, the code generator GUI (Code Generator GUI Plugin) and the main code generator (Code Generator Module Plugin). The code generator GUI is based on the following blocks:
• Front-End
• Properties
• Generation Execution

The front-end is the generator interface relative to the user, where the user interacts with it directly. Through the front-end the user can access the code generator properties and can start the code generation procedure. An interface can be a popup menu, or a menu in the toolbar of Eclipse. The properties element is a menu called by the front-end, where the user can set specific actions to the source code generator. Such actions can be the generation output folder, to generate header files, to generate the C makefile, to generate the author name in all the source files, etc. The generation execution is the main entry point of the code generation module. According to the properties set by the user, it calls the code generation module plugin for starting the actual code generation procedure. The code generator module has been developed with different levels of abstractions based on templates, services and execution chains elements. Templates describe the information required to generate source code from a meta-model such as UML. Within each template, several scripts enable the developer to customize the generator accurately. The developer writes the templates repository in Model to Text Language (MTL), an implementation of the Object Management Group (OMG) MOF Model to Text Language (MTL) standard. Services are used to extend templates in order to implement complex operations that would be very complicated to implement within the template files. Services are public methods which are executed in the same context, from one call to another. Execution chains are used to execute a generation for a target application. They allow the chaining of several generations and operations on models. Execution chains are used to simplify execution and customization operations for the generation. The actions part, also called action set, contains all the tasks that must be carried out by the execution chains according the configuration of the code generation module. Finally, the Code Generation Engine parses the input model and the specified template/services described above for the selected target source code language in order enable the transformation of the input model to the selected source.

PERFORMANCE OPTIMISATION
The performance optimization module includes three main components: a graphical interface for the configuration of the module, the optimised code generation templates & instrumentation and the partitioned models optimisation module. The performance optimisation GUI provides the user configuration interface for the performance-tuning functionalities. Through the GUI the user accesses the separate functions executed by the performance optimisation module and is able to configure the relevant parameters for each functionality. A menu with the available configuration options is integrated within Eclipse, where the user includes the desirable configurations and specific actions for the execution of the performance optimisation module.

The optimised code generation templates & instrumentation component provides additional code generation strategies to achieve code optimisation according to developer’s needs and constraints. Different programming strategies affecting the utilisation of machine resources are defined and evaluated for the UML modelling concepts implemented by the code generation mechanism. In order to evaluate the performance impact of each source code generation strategy, specific performance indicators are identified including memory consumption and code execution metrics. The developed code generation strategies include templates, services and execution chains for each performance indicator. The partitioned models optimisation component includes the parsing mechanism of UML-specific model representations of a virtualised embedded system. Additionally, it provides the interworking interface with the Xoncrete external tool making the proper model transformations according to the Xoncrete tool API specification. Finally, it generates the optimized scheduling configuration file according to the user input that enables the deployment of the XtratuM hypervisor on the target platform based on the input model specifications.

TOOLSET INTEGRATION
In the frame of the MODUS project, the Eclipse Modelling Framework (EMF) has been used, which is a modelling framework for building tools and other applications based on a structured data model. EMF provides an open source integrated and user-consumable environment for editing any kind of EMF model and particularly supporting UML and related modelling languages such as SysML and MARTE. In addition, the integrated Papyrus tool provides diagram editors for EMF-based modelling languages amongst them UML 2 and SysML and the glue required for integrating these editors (GMF-based or not) with other CASE tools. MODUS tool is composed by extension modules that implement the various supported functionalities in an independent and configurable way. By building on the infrastructure provided by the EMF, the MODUS tool is highly customizable and can be easily augmented with additional features in an incremental and non-invasive manner.

Potential Impact:
The MODUS business case is centred on the role of SME Associations and a service oriented business model. These organisations will act either as the providers or the distributors of the MODUS toolset and methodologies to their members, as well as to external SMEs or larger industrial players. In the former case (SME-AGs acting as tool providers), SME Associations will hire technical personnel that will be assigned the tasks of adapting the toolset to different customer requirements (use of specific standard or proprietary FDTs, programming languages, implementation/code-generation standards, etc), maintaining/evolving the toolset, and providing technical support services. In the case that SME-AGs will act as distributors, the aforementioned tasks will be outsourced to third-parties possessing the required skills and expertise.
The MODUS project results are expected to reach the market in about one year after the end of the project, therefore we expect that the commercial use of the MODUS tools and methodologies will start in the second quarter of 2015. During the year after the project end (i.e. March 2014 – March 2015), each of the project SME-AGs will exploit the project results by the creation of a value chain, towards embedded-software development SMEs, offering consulting, training and customisation services. The starting point will be provided by the tool instances that been developed and used for proving the MODUS concept during the project course. The RTD Performers have agreed to provide guarantee (bug-fixing) services to the MODUS SME-AGs/SMEs during this period free of charge. Beyond that period, the RTD Performers will be assigned by the SMEs the upgrade and the evolution maintenance of the tools under special financial agreements.
Towards the successful commercialisation of the MODUS results the project has performed a thorough analysis and research on the applicability of the software business models used today (D7.7/D7.8). During the course of Task 7.4 the project defined in a concrete manner the following main dimensions of the MODUS business and cost models.
• The MODUS value proposition and target market segments in relation to different application domains (aeronautics, automotive, telecommunications, etc).
• The structure of the value chain possibly varying across different application domains.
• The cost structure, payback and profit potential for the involved players.
• The position of SME-AGs and SMEs within the value network.
• A generic risk management strategy.
The definition of the MODUS business models and cost models will serve as input towards the formulation of the individual business plans of the involved SME Associations. The definition of the cost structure, pricing strategy, and profit potentials for each SME-AG partner will be of key importance to the commercial success of the project results. The pricing strategy will be determined following the principles of absorption cost pricing, which entails that the price of a product is set to absorb the costs. With regard to exploitation the MODUS consortium explicitly states that there are no existing anticipated business agreements which may impose limitations on the subsequent exploitation or information or inventions generated as a result of the project.

DISSEMINATION ACTIVITIES
Dissemination activities are very important for the project and aim to create and increase awareness about the MODUS offerings and its benefits, to attract new potential users and customers, to increase the business opportunities as well as to receive feedback for the MODUS solutions value and acceptance and to pave the way for new business alliances. Thus, a solid dissemination strategy for the project was deemed a necessity, in order to make available to the general public and the stakeholders the project achievements and the lessons learnt. A dissemination strategy constitutes of dissemination policies; the planning of dissemination policies, which is a horizontal procedure along the overall project lifecycle, has started actively. The actual dissemination policies are based on three major dissemination channels and their corresponding dissemination activities. Each dissemination policy is designed as blend of dissemination activities from one or more channels, with respect to the respective target group(s) that aims to address. The three channels are:
• Online Dissemination.
• Non-Electronic Dissemination.
• Interactive Dissemination.

A multi-step and multi-channel dissemination strategy has been followed in order to reach different target groups, with information adjusted carefully to audience level of need / involvement. The RTD-Performer industrial partners of the MODUS consortium approached relevant industry sectors (aeronautics, automotive, industrial automation, telecommunications, consumer electronics, etc) as well as developers of software engineering tools, their distributors and client networks. The academic RTD Performer was focused on disseminating the project results towards a wide audience in the area of embedded software engineering as well as research institutes and universities. High-level dissemination of the MODUS project objectives and results, as well as evaluation of the potentiality of the TRIAL and TUNE tools for accelerating the adoption of software quality strategies by SMEs, has also been conducted through workshops, including presentations to selected group of enterprises and organizations followed by discussions and demonstration of case studies, giving the opportunity to potential end users, participating in the workshop, to experience the MODUS tools’ functionality and review applications prototypes in selected case studies.In addition, the MODUS SIG and Forum has been established. The MODUS SIG includes business partners and customers of the participating software SMEs and SME Associations, as well as, universities and research institutes working on related topics.The MODUS project has also identified since the very beginning the importance of liaison activities with the FP7-SME-2011-1 - 286706 - VOS4ES and FP7-SME-2011-1 - 286586 – POSTO projects, due to the directly-linked technological areas that exist between them. MODUS will consider synergies in order to raise awareness and visibility of the project results through the co-organization of different events and workshops. In order to achieve this, an internal document has been produced as follows:
• A preliminary version by M2, presenting these dissemination actions and expected results, and defining a common demonstrator that proves the concepts of these three projects.
• A final version by M9, elaborating on these dissemination actions and expected results, and presenting the specification of the common demonstrator.
Furthermore, an Inter-Project Task Force (IPTF) has been established among the 3 projects, consisting of TELETEL, M3 SYSTEMS, HANDCRAFTED SOFTWARE and UNIVERSIDAD POLITECNICA DE VALENCIA. The role of IPTF was the definition and realization of a common demonstrator (“The Gadget”) as a proof-of-concept activity for the three projects. TELETEL was the leader of the IPTF.

ACTIVITIES IN DETAIL

1. MODUS Forum

EMYPEE has already formed a special interest group of experts in the area of embedded systems spanning academia, industry and SMEs. The SIG members have attended the MODUS Workshop (held in Athens at 8/2/2013) and they have delivered key note speeches according to their R&D interests. EMYPEE has recently updated its Web presence (http://beta.computer-engineers.gr/web/guest/home) which includes a new and fully collaborative Web Forum where SIG members have access to share their views and questions with the consortium. SIG members will be given full access to MODUS software and documentation.

2. CONFERENCE PRESENTATIONS AND PUBLICATIONS
• Modus Special Session at the IBC 2012 1st International Internet & Business Conference, English Presentation about the Modus project to IT engineers, SMEs and software scientists, 30 June, 2012, Rovinj, Croatia.
• Yu Info 2012, English Presentation about the Modus project to software engineers, SMEs, software scientists, March, 2012, Kopaonik, Serbia
• Ongoing preparation of paper for 12th WSEAS International Conference on SOFTWARE ENGINEERING, PARALLEL and DISTRIBUTED SYSTEMS (SEPADS '13)Deadline 30 Dec. 2013,Venue: UK, Cambridge publications
• Jelena Ćosić, Software Development For Embedded Systems: Case Study Of Unmanned Aerial Vehicles, Proceedings of the IBC 2012 1st International Internet & Business Conference, June 2012
• Vrankić, Ilko; Pejić Bach, Mirjana; Krpan, Mira, Stackelberg Equilibrium of the Client and the Producer of Embedded Software (Abstract), Proceedings of the 14th International Conference on Operational Research (KOI 2012), September 2012.
  Berger, MS, Soler, J, Brewka, LJ, Tsagkaropoulos, M, Leclerc, Y & Olma, C 2013, 'Methodology and Supporting Toolset Advancing Embedded Systems Quality'. in Proceedings of the 12th International Conference on Software Engineering, Parallel and Distributed Systems (SEPADS '13). pp. 197-202.
• Michalis Loupis, Embedded Systems Development Tools: A MODUS-oriented Market Overview, Business Systems Research Journal. Volume 5, Issue 1, Pages 6–20, ISSN (Online) 1847-9375, April 2014
• Lukasz Brewka, José Soler, Michael Berger, The MODUS Approach to Formal Verification, Business Systems Research Journal. Volume 5, Issue 1, Pages 21–33, ISSN (Online) 1847-9375, April 2014
• Josip Stepanić, Josip Kasać, Marjana Merkač, A Contribution to Considerations of the Role of Embedded Systems, Business Systems Research Journal. Volume 5, Issue 1, Pages 47–56, ISSN (Online) 1847-9375,April 2014
• Ivan Strugar, Jovana Zoroja, Božidar Jaković, Development Practices of Embedded Systems: SMEs in SEE countries, Business Systems Research Journal. Volume 5, Issue 1, Pages 57–67, ISSN (Online) 1847-9375, April 2014
• Ilko Vrankić, Mirjana Pejić Bach, Mira Krpan, Stackelberg Equilibrium of the Client and the Producer of Embedded Software, Business Systems Research Journal. Volume 5, Issue 1, Pages 68–76, ISSN (Online) 1847-9375, April 2014
• Berger, M. S., Soler, J., Yu, H., Tsagkaropoulos, M., Leclerc, Y., & Olma, C. (2013). Methodology and Toolset for Model Verification, Hardware/Software co-simulation, Performance Optimisation and Customisable Source-code generation. W S E A S Transactions on Information Science and Applications, 6(10), 169-178.

3. WORKSHOPS
• Presentation of MODUS project (concept and overview) at the OPEN-SME Information Day organized by the Greek Association of Computer Engineers (Athens, 17/2/2012).
• Presentation of MODUS project (concept and overview) at OPEN-SME Workshop organized by ETEK in Cyprus (Lefkosia, 30/5/2012)
• MODUS brochure distribution in ICT Proposers Day (Warsaw, 26-27/9/2012)
• Presentation of MODUS on DTU Fotonik department seminar (Kgs. Lyngby 06/06/2012)
• Presentation at ICT-NET Workshop, Belgrade, 22/11/2012
• EMHPEE, MODUS Workshop, Athens, 8/2/2013
• INDIN 2013: TU 1 - Tutorial: Demonstration of an Open Source framework for Embedded Systems Verification and Simulation (Bochum, Germany, 29/7/2013)
• Joint POSTO, MODUS workshop, TELETEL, (Greece, 4/10/13) During the Athens’ workshop the results of POSTO project as part of the synergy between POSTO, MODUS and VOS4ES projects have been presented. Additionally, an open discussion between the participants has been initiated to explore further synergies between the different technological areas and to exchange ideas on possible exploitation of the different projects results at R&D or commercial level.

BROCHURES – OTHER

• The MODUS information package (http://www.modus-fp7.eu/upload/institutter/ com/modus-fp7/docs/modus_info_package.pdf ).
• INFOPAKET – Modus projekt – Information Package for Croatia (www.bitsociety.org )
• Various posts on MODUS in the EMHPEE web site ( www.computer-engineers.gr).
• Various posts on MODUS in the ISS web site (http://informacionodrustvo.org/)
• BIT-Modus 1st Newsletter, September 2012, (www.bitsociety.org)
• ICT-NET Brochure, 2012

List of Websites:

MODUS Web Site: http://www.modus-fp7.eu/
or contact:
Dr. Michael Loupis
ITC SA
25 Alketou Street
11633 Athens, Greece
mloupis@itcnet.gr