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Development of innovative ALD materials and tools for high density 3D integrated capacitors

Final Report Summary - PICS (Development of innovative ALD materials and tools for high density 3D integrated capacitors)

Executive Summary:
The PICS project received funding from the European Union's Seventh Framework Program managed by REA-Research Executive Agency (FP7/2007-2013) under grant agreement n° FP7-SME-2013-2-606149.
The PICS project lasted for two years (from 2013 to 2015) and the consortium consisted of three SMEs: IPDiA (France, coordinator), PICOSUN (Finland) and SENTECH Instruments (Germany), and two leading research organizations: Fraunhofer IPMS-CNT (Germany) and CEA-Leti (France). Project objectives was to develop innovative dielectric materials deposited by atomic layer deposition (ALD) and related tools (ALD batch tool and etching tool) in order to bring to mass production a new technology of high density and high voltage 3D silicon trench capacitors.
Two new dielectric stacks were developed and integrated into the IPDiA 3D silicon trench capacitors by IPDiA, CEA-Leti and Fraunhofer IPMS-CNT. The initial specifications were fulfilled and proven by electrical measurements. A new record on capacitance density (>500nF/mm² at 3.3V) and an extended operation voltage (10V with 150nF/mm²) were obtained, which expands IPDiA’s ability to meet current market requirements particularly in the field of medical or aeronautics. Qualification procedure was initiated during the project by launching preliminary reliability studies and it will continue in the coming months.
During the project, the manufacturability of this new technology and its financial viability were ensured by developing adequate industrial tools targeting mass production.
A novel ALD batch tool was developed by PICOSUN and Fraunhofer IPMS-CNT. It enables to reduce cost-of-ownership and deliver better uniformity and step coverage for high-K dielectrics into 3D structures. With its demonstrated, optimized and production-proven ALD processes, PICOSUN is solidifying its position as a technological leader in the IC, Semiconductor, MEMS markets, from R&D to production systems.
A new process for accurately etching high-K dielectrics, which are very specific materials, was demonstrated by SENTECH with the help of Fraunhofer IPMS-CNT. As a result, SENTECH has the potential to gain market share in the field of high-k materials, which have high interest for different applications, e.g. LED, MEMS, magnetic data storage.
• Duration of the project: 24 months, starting 01/09/2013
• Call (part) identifier: FP7-SME-2013
• Project number: 606149

Contact : Charlotte JENNEQUIN - IPDiA
Phone: +33(0)2 31 535 400
2 rue de la girafe
1400 Caen

Project Context and Objectives:
1- A need for highly integrated and high performances electronic modules
With the fast development of applications based on smart and miniaturized sensors in aerospace, medical or automotive domains, requirements on electronic modules are more and more linked to higher integration level and miniaturization (in order to increase the functionality combination and the complexity within a single package) and to higher performances (in order to ensure long life operations and be able to place the sensors as close as possible to the “hottest” areas for efficient monitoring).
Medical application is a good example to illustrate this trend. New applications, especially in the field of nomad or implantable devices, are appearing such as pacemaker, defibrillator, cardiac rhythm management, hearing aid (Cochlear implant, external behind-the-ear, in-the-ear, invisible canal…), blood pressure control, glaucoma control, electronic lens, motion control. All these applications are requiring key factors like:
• Increasing the life time of the module, especially for implantable modules. As an example, to increase from 8-10 years to 15-20 years implantable defibrillator module life time.
• Increasing the range and the quality of the functionalities within the same volume for the module: more computing, more memory footprint, more RF communication (WiFi, Bluetooth, etc…), more sensors for diagnostic, etc…As an example, to put autofocus capability for presbyopia dynamic recovering within bionic contact lens.
• Improving the comfort of the patient. As an example, to replace behind-the-ear by in-the-ear or implantable hearing aid modules in order to decrease the equipment weight decreasing and improve the discretion.
In order to address the following main application requirements, key electronic components as well as the general electronic architecture need to be improved:
• To decrease the power consumptions during stand-by modes (leakage currents) and operating mode (global power consumption). At component level, silicon integration of passive devices (capacitors, inductors, resistors) can lead to better performances thanks to shorter interconnections.
• To allow vertical integration in z axis in order to remain with the smallest footprint as possible for the module thank to an advanced 3D packaging approach. Here again integrated passive devices technology can be a solution. Dealing with external components is a big issue for 3D integration because of dimensions mismatch and various pads types.
• To improve reliability of the electronic modules. External components based modules have some reliability limitations because material mismatch between most of the external components (Silicon) and laminated, organic or ceramic substrates.

2 - Capacitor: a key component presented in every electronic modules
Capacitors are key components presented in every electronic module. They have many important applications including storing electric potential energy, delaying voltage changes when coupled with resistors, filtering out unwanted frequency signals, forming resonant circuits and making frequency-dependent and independent voltage dividers when combined with resistors.
IPDiA has developed for many years a technology of integrated capacitors (called PICS, see Figure 2) which overcomes current technologies (using ceramic or tantalum substrates) and which enables to build highly integrated and high performances electronic modules. This technology can replace external discrete passive by integrated passive component with better performances:
- Leakage current reduction during stand-by modes,
- better form factor for capacitors and inductors,
- components integration capabilities thanks to RF domain,
- reliability enhancement.
IPDiA high stability capacitors are dedicated to all demanding applications where stability is the main parameter. IPDiA Silicon capacitors offer improved temperature, voltage, and aging performance as well as high reliability far exceeding the alternative capacitor technology. Figure 3 illustrates the area saving obtained by replacing MLCC and Tantalum capacitors by PICS capacitors. The electronic section of a defibrillator integrates various SMD capacitors for decoupling purposes and charge pump applications. Some active dies can be wire bonded or flip chipped directly on the PCB due to space constraints.

3 - PICS project: developing new generation of integrated capacitors to open new markets
PICS project aimed to go further and to bring a technological gap to get higher densities of capacitors and higher breakdown voltage. The obtained results will open the way to new markets by offering even more miniaturization and performances. Indeed, increase of the capacitor density while keeping an acceptable breakdown voltage is very challenging and requires the integration of innovative high-k materials. So, the goal of the PICS project was to help IPDiA, and the two associated SMEs SENTECH and PICOSUN, to take up successfully this challenge.
The key enabling technology chosen to perform this technological gap is Atomic Layer Deposition (ALD). When high aspect ratio trench dimensions narrow down to nanometer scale (like in PICS capacitors), ALD is the only possible thin film coating method with which e.g. contact metallization, seed, barrier or adhesion layers can be deposited with satisfactory conformability, uniformity and pinhole-free quality.
Two main tracks have been followed during the PICS project:
• Assess the manufacturability of world-record high density PICS capacitors (500nF/mm2, 3.3V). It included the development of industrial process tools (ALD, etching) providing extremely fast process times and very low cost of ownership and also reliability studies to ensure that we get a Failure-In-Time (FIT) better than conventional capacitors.
• Demonstrate the feasibility of a high voltage PICS capacitor (200nF/mm2, 10V) and set-up its technological development roadmap. It has been based in particular on process developments to realize high thickness dielectric layers into 3D trench capacitors.
PICS project results will allow IPDiA to stay in the lead in IPD market by accelerating the time-to-market of the next generation HD-PICS4 (500nF/mm2, 3.3V) and by extending its technological offer to new market area with the HV-PICS4 (200nF/mm2, 10V). This technological extension with a higher voltage is a major point for IPDiA in order to open wider new markets like automotive market.

4- High-K materials process tools (ALD and etching) with extended capabilities
Besides the application for the IPDiA 3D trench capacitors, ALD deposit tools, provided by PICOSUN and others, are used for several years to realize a wide selection of electronics components and devices.
Due to the constantly decreasing component size, most of the conventional thin-film manufacturing methods fall short when reliably uniform, dense, conformal and pinhole-, crack- and defect-free films have to be deposited. For example through-silicon-via contact metallization or other thin films for high aspect ratio geometries common in today’s chip architectures are practically impossible to prepare evenly and conformably enough with other thin film deposition methods, e.g. PVD or CVD, whereas the ALD method’s gas-phase, surface-controlled and self-saturating nature ensures high quality film formation even on the most challenging nanoscale geometries. However, throughput is low and the process is sensitive to surface preparation.
PICS project aimed to help PICOSUN to keep its leading position in Atomic Layer Deposition (ALD) equipment manufacturing by scaling at industrial scale innovative ALD processes. New materials developed for the user-case IPDiA (i.e. Al2O3/HfO2 nanolaminates) are now integrated to the commercial offer of PICOSUN. In particular, the new processes have been adapted to an ALD batch tool able to provide an extremely fast process times and very low cost of ownership.
Concerning high-K etching, the challenges are to control precisely the parameters of the plasma to be able to stop into thin layers. High-k dielectrics belong to the group of low-volatile materials which means that these materials are very stable against chemical attack. The consequence is a low selectivity to the underlying layers and a high amount of residuals that remain in the etch chamber and limit the uptime. In order to achieve a reasonable selectivity to the underlying layers, low damage rates and high edge steepness special measures are mandatory such as chlorine-based etch chemistry and elevated substrate temperatures. The generation of volatile by-products is very important to achieve a productive process with high uptime and low cost of ownership.
The user-case brought by IPDiA during the PIC project is challenging because the handling of these materials with very different thicknesses demands leading edge technology achievements. The new processes developed during the PICS project will increase competitiveness of SENTECH and give access to markets in new fields of applications, because high-k materials are gaining high interest for different applications (e.g. LED; MEMS, magnetic data storage).

Project Results:
The main scientific an technical results achieved during the project are mainly confidential. In fact these results are the basis of the IPDIA's technology which is unique at this day. Then just a small summary will be given below, and the more detailed results are in the report joined.
S&T results
ALD batch tool:
- HfO2/Al2O3 MIM stack available (incl. TiN) on PICOSUN batch tool
- HfO2/Al2O3 = best process with up to 80% stepcoverage and < 3.0% in-wafer non-uniformity
- Pure Al2O3 MIM stack available on PICOSUN batch tool
- Al2O3 = best process with 90% stepcoverage

Etching process:
- ICP BCl3/Cl2 dry etch process on 6“ wafers with
• High reproducibility of etch rate
• Very good uniformity (OE ctr vs. edge <10nm)
• Side wall angle >45°
• Very good process control (OE < 50nm)
• End point detection by SLI

High Density (HD) capacitors:
- 500nF/mm² proven with a HfO2/Al2O3 dielectric stack in a MIMIM configuration; other specs fulfilled = breakdown voltage, leakage
- Better understanding of integration issues affecting yield
- First results on reliability of MIM 3D capacitors

High Voltage (HV) capacitors:
- Choice of pure Al2O3 for HV application
- Results on reliability of thick Al2O3 stack
- MIM and MIMIM 3D capacitors with pure Al2O3

Alternatives electrodes:
- Evaluation of different materials to replace Poly-Si with lower resistivity metal layer and lower thermal budget

Potential Impact:
1 - Impact for SMEs
First, the results of PICS project allow IPDiA continuing its roadmap on high density capacitors. The initial specifications were fulfilled and proven by electrical measurements and a new record on capacitance density (>500nF/mm² at 3.3V) has been obtained. Good results were also obtained on breakdown voltage (corollary to enhanced reliability), leakage (corollary to very high isolation, which is important parameter in medical application) and temperature/voltage linearity and stability. This last point is a key feature because it saves oversizing of capacitors to get the right value whatever the operating voltage, as it is done in MLCC or tantalum capacitors. IPDiA has now a new generation of integrated capacitors offering further miniaturization and keeping the added-values of low leakage and stability. Samples of HD-PICS 4 capacitors have been send to IPDiA’s customers in order to be evaluated. The first feed-backs show that the performances are considered very attractive and commercial orders are possible. Now, IPDiA should get a better yield in order to meet the demand.
Secondly, we have demonstrated an extended operation voltage (Vuse=10V with 150nF/mm²) for IPDiA integrated capacitors. This expands IPDiA’s ability to meet current market requirements particularly in the field of medical or aeronautics. Higher voltage is a new roadmap followed by IPDiA. There is a huge demand of many markets such as automotive, LEDs and medical for miniaturized power devices and silicon integrated capacitors had never get a good position in these markets. IPDiA can offer now a new kind of components combining sufficient operating voltage and outstanding performances on miniaturization, stability and linearity; it is clearly differentiating features. IPDiA may have an important role to play in this area.
PICOSUN has reactors to realize ALD deposition, but the recipes (processes) and the application have been missing till now. Thanks to PICS project, PICOSUN is able to provide “silicon proven” recipes for nanolaminate and Al2O3 dielectrics and for different thicknesses (especially high thicknesses). They are now integrated to the commercial offer of PICOSUN. The 3D trench capacitor was a particularly challenging user case due to very high aspect ratio and it will be a good way of promotion for PICOSUN tools. The scaling up to batch enables PICOSUN to produce reactors which fulfil the requirement of extremely fast process times and very low cost of ownership. In particular, the demonstrated performances enable PICOSUN to access to DRAM segment where aspect ratios are also very challenging.
Concerning SENTECH Instrument, the etch process dedicated for mixed high-k materials developed during the project is a unique feature which is not known by other plasma equipment suppliers. So, the obtained results give clearly an added-value to the SENTECH systems. Moreover, the results are very good in terms of reproducibility and uniformity and it will allow SENTECH to answer the most stringent requirements. SENTECH has the opportunity to access to markets in new fields of applications especially now because high-k materials are gaining high interest for different applications (e.g. LED; MEMS, magnetic data storage).

2 - External impact
The PICS project gives to the three SMEs new processes, tools or components expanding their commercial offer and it will hopefully lead to market shares gains. The three SMEs are producing in Europe and new markets means new jobs. This is a first socio-economic impact of the project. This is particularly important to mention it for the case of IPDiA. This SME is located in a area which lost a lot of jobs in microelectronic sector (NXP employed few thousand people in Caen 10 years ago) and the IPDiA development is strategic to maintain this ecosystem.
Considering wider societal impact, it is hard to already clearly assess it because we developed tools and components and not systems dedicated to a specific application. Nevertheless, the first idea that comes to mind is the use of miniaturized capacitors in the medical domain. With higher capacitance density and integration capabilities into a unique silicon interposer, the size of electronic modules and medical implants can be drastically reduced. It will improve the comfort of the patient for instance by replacing behind-the-ear by in-the-ear implantable hearing aid modules and it will reduce the impact of operations for instance by installing smaller pacemakers. Secondly, the stability and reliability offered by IPDiA products will extend the operation life of medical implants and it will allow saving time between two operations.

3 - Dissemination activities
Before making a status on the dissemination activities realized during the project, we remind below our dissemination strategy.
It was agreed between partners that all results cannot be made accessible. Some of the data are related to specific know-how owned by SMEs or acquired during the project and must be kept secret to avoid losing competitive advantages or returns on investment. Nevertheless, we tried to disseminate some of our results to get feedback from academics, consultancies and end-users. We planned to deliver the following messages:
Message 1 We have demonstrated a new technology of integrated capacitors with outstanding performances on capacitance density and operation voltage. Stabilization of this technology is in progress and it will be manufactured soon by IPDiA.
Message 2 SENTECH and PICOSUN can offer new tools for high thickness ALD layer etching and ALD batch processing.
Message 3 We have obtained new knowledge on high K dielectric layers integration into 3D structures.

For message 1 and 2, the targeted audience are the existing and new potential customers of the three SMEs. Message 3 is more dedicated to the scientific community. Dissemination is effective when multiple communication channels are considered. In that respect, we have identified the following means for communicating the project awareness and achievements

All messages • Publish press releases in various media and countries to announce the project milestones and final results.
• Present the project and its results as they become available during related thematic events, workshops and conferences.
• Participate in events organized by the EC.
Message 1 • Present the last generation of components during industrial exhibitions.
• Provide samples for evaluation.
• Send information to customers through newsletters and mailing lists.
Message 2 • Present the new tools and recipes during industrial exhibitions.
• Perform demos.
• Send information to customers through newsletters and mailing lists.
Message 3 • Publish in scientific and industrial journals.

The dissemination activities realized during the project are summarized into Table A2. We give below some details on specific items marked by a number into the table.
1. A general press release (see deliverable D6.1) was published end of October 2013 to announce the project kick-off. Few days after, PICOSUN released its own press release to focus more on ALD process and on their role and expected benefits. SENTECH did the same beginning of January 2014. These press-releases are available in the project website:
2. A flyer was edited in October 2013. It has been used during commercial exhibitions.
3. In December 2013, PICOSUN spoke about PICS project into its newsletter, see
4. Fraunhofer mentioned the PICS project into the IPMS annual report: see page 34 in
5. SENTECH participated the 19-20 March 2015 in Berlin to NIL industrial days which is an industrial event aiming to inform industrial early adopters and/or those companies evaluating to invest in NIL (Nano Imprint Lithography). Dr. Cay Pinnow mentioned during his speech the etching results obtained during PICS project.
6. IPDiA presented in March 2015 some results on reliability in the 11th International Conference and Exhibition on Device Packaging (DPC 2015) which is a conference with a strong industrial scope. Some of these results were based on developments done during the PICS project.
7. In March 2015, CEA and IPDiA submitted a proposal to FutureFlash best project competition organized in the frame of EuroNanoForum (10-15 June 2015, Riga), see Our project was selected and a poster was prepared to be presented on our stand. Unfortunately we have to cancel our participation at the last minute because C. Billard (CEA) who intend to represent PICS consortium has to leave rapidly its position for two months for family reasons.
8. Fraunhofer did a scientific communication related to PICS project : M. Czernohorsky, “Development of innovative ALD materials for high density 3D integrated capacitors”, ALD Symposium, SEMICON Europe 2014, Oct 7-9, Grenoble, France.
Fraunhofer contributed with a paper “Ultra-thin high density capacitors for advanced packaging solutions” to the 20th European Microelectronics and Packaging Conference & Exhibition (Sep 13-16, 2015 in Friedrichshafen, Germany,
9. Fraunhofer organized trainings of engineers of SENTECH and PICOSUN.
10. A draft of press release presenting the final results of the project has been edited and shared between partners. The diffusion was done the 26th of October 2015.
11. A. Lefevre from CEA will present a paper entitled “HfO2-Al2O3 nanolaminate dielectric for ultra-high integrated MIM capacitors” in the RAFALD workshop (Nov. 16-18, 2015 at Grenoble, France).
In conclusion, we almost fulfilled our targets for the dissemination activity. We hope to get final electrical results soon to finalize our dissemination plan with new actions like focused press releases and scientific papers (for instance on etching tool or on capacitors reliability results).
4 - Exploitation of results
The exploitable results obtained during the PICS project (defined as knowledge having a potential for industrial or commercial application) are summarized into the following table for the non confidential part ( otherwise the details are given in the joined report):

Result 1:
Exploitable Knowledge (description): HfO2/Al2O3 and pure Al2O3 ALD process implemented in a batch tool
Exploitable product(s) or measure(s): Process parameters, specific ALD tool
Sector(s) of application: Microelectronic
Timetable for commercial use: 2015
Patents or other IPR protection: Know-how on ALD process, patents on ALD tools
Owner & other Partner(s) involved: Developed by Fraunhofer and transferred to PICOSUN (owner)

Result 2:
Exploitable Knowledge (description): HfO2/Al2O3 nanolaminate etching, thick Al2O3 etching
Exploitable product(s) or measure(s): Process parameters
Sector(s) of application: Microelectronic
Timetable for commercial use: 2015
Patents or other IPR protection: Know-how on etching process, patents on etching tools
Owner & other Partner(s) involved: Developed by Fraunhofer and transferred to SENTECH (owner)

Result 3:
Exploitable Knowledge (description): Process bricks to integrate ALD dielectrics into PICS technology
Exploitable product(s) or measure(s): Process parameters, measurements
Sector(s) of application: Microelectronic
Timetable for commercial use: 2015-2016
Patents or other IPR protection: Know-how on silicon integration
Owner & other Partner(s) involved: Developed by CEA and transferred to IPDiA (owner)

Result 4:
Exploitable Knowledge (description): High density and high voltage Integrated capacitors
Exploitable product(s) or measure(s): Components
Sector(s) of application: Medical, industrial, telecom
Timetable for commercial use: 2015-2016
Patents or other IPR protection: Patents on PICS technology
Owner & other Partner(s) involved: IPDiA (owner)

List of Websites:


Name Company Contact information

Coordinator IPDiA
+33(0)2 31 535 400
2 rue de la girafe, 1400 Caen, France

Christophe BILLARD CEA
CEA-Grenoble, LETI/DCOS, 17 rue des Martyrs 38054 Grenoble cedex 9

+358 50-436 7177
Picosun Oy, Masalantie 365, FI-02430 Masala, Finland

+49 30 63 92 56 21
SENTECH Instruments GmbH, Schwarzschildstr. 2, 12489 Berlin, Germany

+49 351 2607 3032
Fraunhofer IPMS-CNT, Königsbrücker Straße 180, 01099 Dresden, Germany