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Developing Hardware and Design Methodologies for Heterogeneous Low Power Field Programmable Servers

Project description


Advanced Computing, embedded and Control Systems

The goal of this project is to reduce the power performance ratio within data-centres by improving the usability and usefulness of FPGAs, embedded CPU (eCPU), GPUs and multi/manycore accelerators in high-performance and low-power heterogeneous computing servers. We target applications between traditional super computing tasks (where huge amount of man-power can be spent for manual algorithm optimization) and general purpose data-centre applications (which have to run as they are w/o any optimization for hardware acceleration).The consortium consists of partners from embedded systems and high-performance computing domains. We will combine our experiences in automatic software-to-hardware synthesis and hardware-software co-design from the embedded systems world with the hardware and application experience from the high-performance computing world.The project focus will be on a) setting up a flexible server hardware system, offering a user-constrainted amount of CPUs, eCPUs, FPGAs, GPUs and multi/manycore processors; b) setting up a software development environment, easing up computing resources co-programming adapted fromexisting tools and runtime management techniques from the embedded system domain and leveraging state-of-the-art middle-ware communication and execution frameworks from the HPC domain; and c) demonstrate the effectiveness of both hardware and software environments from FiPS outputs with real world applications at four HPC application partners.

Call for proposal

FP7-ICT-2013-10
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Coordinator

OFFIS EV
EU contribution
€ 841 200,00
Address
ESCHERWEG 2
26121 Oldenburg
Germany

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Region
Niedersachsen Weser-Ems Oldenburg (Oldenburg), Kreisfreie Stadt
Activity type
Research Organisations
Administrative Contact
Domenik Helms (Dr.)
Links
Total cost
No data

Participants (9)