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HARDWARE ENABLED CRYPTO AND RANDOMNESS

Deliverables

Demonstrator Specification

This deliverable will contain detailed Software & hardware specifications of the demonstrator platform and the hector hardware device as output of T4.1.

Report on Attacks

This report will present and analyse results of selected attacks, including side-channel attacks (power, time, EM), fault attacks (glitches, power supply variation, temperature variations), EM perturbation attacks and others.

Data Management Plan (DMP)

As HECTOR is taking part in the Pilot on Open Research Data a first version of the DMP as an early deliverable will be provided within the first six months of the project. The purpose of the DMP is to provide an analysis of the main elements of the data management policy that will be used by the applications with regard to all the datasets that will be generated by the project. The DMP is not a fixed document, but evolves during the lifespan of the project. More developed versions of the plan can therefore be included as additional deliverables at later stages. According to the Guidelines on Data Management in Horizon 2020, the DMP should address data set reference and name, data set description, standards and metadata, data sharing and archiving and preservation (including storage and backup) on a dataset by dataset basis and should reflect the current status of reflection within the consortium about the data that will be produced.

Demonstrator Security Evaluation

This deliverable will contain the results of the security evaluation & testing campaign led in T4.4.

Report on Selected TRNG and PUF Principles

Stochastic models and embedded tests.

Risk Assessment Plan

The Risk Assessment Plan will include a Critical Path Analysis (CPA) of the main project activities, identifying risk points, and procedures to deal with them. This deliverable is marked with nature “O” (OTHER) and will be accompanied by a small written report outlining its structure and purposes in order to justify the achievement of this deliverable.

Project Quality Plan

The project quality plan (the project handbook) constitutes a set of project templates, explanations on the project management process, review process, quality checks, meeting organisation, which is communicated to all partners. This deliverable is marked with nature “O” (OTHER) and will be accompanied by a small written report outlining its structure and purposes in order to justify the achievement of this deliverable.

Final Report on Data Management

This report will summarize the efforts of the HECTOR consortium to handling of open research data.

Internal and External IT Communication Infrastructure and Project Website

The external IT communication infrastructure constitutes a guideline for communication of the HECTOR project to external target groups including conferences, marketing measures and communication channels. Furthermore this deliverable constitutes the launch of the internal HECTOR communication infrastructure including the establishment of mailing lists or a subversion server, and the HECTOR website. This deliverable is marked with nature “DEC” and will be accompanied by a small written report outlining its structure and purpose in order to justify the achievement of this deliverable.

Demonstrator Platform

This deliverable will consist of the complete setup of the demonstrator platform as output of T4.2 and T4.3 Only the VHDL code corresponding to the deliverable is CO. The accompanied report and the sample data are public.

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Publications

Iterating Von Neumann’s Post-Processing under Hardware Constraints

Author(s): Rozic Vladimir, Yang Bohan, Dehaene Wim, Verbaudwhede Ingrid
Published in: IEEE Int. Symposium on Hardware-Oriented Security and Trust , 2016
DOI: 10.5281/zenodo.55456

Cache Template Attacks: Automating Attacks on Inclusive Last-Level Caches

Author(s): Gruss Daniel, Spreitzer Raphael, Mangard Stefan
Published in: 24th USENIX Security Symposium 2015 , 2015
DOI: 10.5281/zenodo.55454

Square Attack on 7-Round Kiasu-BC

Author(s): Dobraunig Christoph, Eichlseder Maria, Mendel Florian
Published in: 14th International Conference on Applied Cryptography and Network Security , 2016
DOI: 10.5281/zenodo.55445

Canary Numbers: Design for Light-weight Online Testability of True Random Number Generators

Author(s): Rozic Vladimir, Yang Bohan, Mentens Nele, Verbauwhede Ingrid
Published in: Random Bit Generation Workshop 2016 , 2016
DOI: 10.5281/zenodo.56625

Efficient Fuzzy Extraction of PUF-Induced Secrets: Theory and Applications

Author(s): Delvaux Jeroen, Gu Dawu, Verbaudwhede Ingrid, Hiller Matthias, Yu Meng-Day
Published in: Conference on Cryptographic Hardware and Embedded Systems 2016 , 2016
DOI: 10.5281/zenodo.55449

A Physical Approach for Stochastic Modeling of TERO-based TRNG

Author(s): Haddad, Patrick; Fischer, Viktor; Bernard, Florent; Nicolai, Jean
Published in: Cryptographic Hardware and Embedded Systems -- CHES 2015, 2015, Page(s) 357-372
DOI: 10.5281/zenodo.60900

Practical Memory Deduplication Attacks in Sandboxed Javascript

Author(s): Gruss, Daniel; Bidner, David; Mangard, Stefan
Published in: Computer Security -- ESORICS 2015, 2015, Page(s) 108-122
DOI: 10.5281/zenodo.55453

Forgery and Subkey Recovery on CAESAR candidate iFeed

Author(s): Schroé, Willem; Mennink, Bart; Andreeva, Elena; Preneel, Bart
Published in: Selected Areas in Cryptography - SAC 2015, 2015, Page(s) 197-204
DOI: 10.5281/zenodo.55452

On the Impact of Known-Key Attacks on Hash Functions

Author(s): Mennink, Bart; Preneel, Bart
Published in: Advances in Cryptology – ASIACRYPT 2015, 2015, Page(s) 59-84
DOI: 10.5281/zenodo.55450

Higher-Order Threshold Implementation of the AES S-Box

Author(s): De Cnudde, Thomas; Bilgin, Begül; Reparaz, Oscar; Nikov, Ventzislav; Nikova, Svetla
Published in: Smart Card Research and Advanced Applications, 2015, Page(s) 259-272
DOI: 10.5281/zenodo.58086

ARMageddon: Cache Attacks on Mobile Devices

Author(s): Lipp, Moritz; Gruss, Daniel; Spreitzer, Raphael; Maurice, Clémentine; Mangard, Stefan
Published in: 25th Annual USENIX Security Symposium, 2016
DOI: 10.5281/zenodo.59889

Statistical Fault Attacks on Nonce-Based Authenticated Encryption Schemes

Author(s): Dobraunig, Christoph; Eichlseder, Maria; Korak, Thomas; Lomne, Victor; Mendel, Florian
Published in: 22nd Annual International Conference on the Theory and Applications of Cryptology and Information Security (Asiacrypt2016), 2016
DOI: 10.5281/zenodo.154485

Analysis of the Kupyna-256 Hash Function

Author(s): Dobraunig, Christoph; Eichlseder, Maria; Mendel, Florian
Published in: ACM SIGSOFT International Symposium on the Foundations of Software Engineering, 2016
DOI: 10.5281/zenodo.121361

Evaluation of AIS-20/31 compliant TRNG cores implemented on FPGAs

Author(s): Petura, Oto; Mureddu, Ugo; Bochard, Nathalie; Fischer, Viktor; Bossuet, Lilian
Published in: https://hal.archives-ouvertes.fr/hal-01382990, Issue 1, 2018
DOI: 10.5281/zenodo.1287567

Upper Bounds on The Min-Entropy of RO Sum, Arbiter, Feed-Forward Arbiter, and S-ArbRO PUFs

Author(s): Jeroen Delvaux; Dawu Gu; Ingrid Verbauwhede
Published in: Issue 3, 2016
DOI: 10.5281/zenodo.375498

A comparison of PUF cores suitable for FPGA devices

Author(s): Mureddu, Ugo; Bossuet, Lilian; Fischer, Viktor
Published in: Conference on trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE), 2016, Barcelone, Spain. 2016, Issue 4, 2016
DOI: 10.5281/zenodo.1287571

ES-TRNG: A High-throughput, Low-area True Random Number Generator based on Edge Sampling

Author(s): Yang, Bohan; Rozic, Vladimir; Grujic, Milos; Mentens, Nele; Verbauwhede, Ingrid
Published in: Issue 1, 2018
DOI: 10.5281/zenodo.1434083

Two Methods of the Clock Jitter Measurement Aimed at Embedded TRNG Testing

Author(s): Petura , Oto; Laban , Marek; Noumon Allini , Elie ,; Fischer , Viktor
Published in: Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE 2018), Issue 1, 2018
DOI: 10.5281/zenodo.1284209

ISAP -- Towards Side-Channel Secure Authenticated Encryption

Author(s): Christoph Dobraunig; Maria Eichlseder; Stefan Mangard; Florian Mendel; Thomas Unterluggauer
Published in: 2519-173X, Issue 3, 2017
DOI: 10.13154/tosc.v2017.i1.80-105

Masking AES With d+1 Shares in Hardware

Author(s): Thomas De Cnudde, Oscar Reparaz, Begül Bilgin, Svetla Nikova, Ventzislav Nikov, Vincent Rijmen
Published in: Proceedings of the 2016 ACM Workshop on Theory of Implementation Security - TIS'16, 2016, Page(s) 43-43
DOI: 10.1145/2996366.2996428

Design and Testing Methodologies for True Random Number Generators Towards Industry Certification

Author(s): Balasch, Josep; Bernard, Florent; Fischer, Viktor; Grujic, Milos; Laban, Marek; Petura, Oto; Rozic, Vladimir; Van Battum, Gerard; Verbauwhede, Ingrid; Wakker, Marnix; Yang, Bohan
Published in: Issue 2, 2018
DOI: 10.5281/zenodo.1289440

A Methodology for the Characterization of Leakages in Combinatorial Logic

Author(s): Guido Bertoni; Marco Martinoli
Published in: Issue 3, 2016
DOI: 10.5281/zenodo.571605

Exploring active manipulation attacks on the TERO random number generator

Author(s): Cao, Yang; Rozic, Vladimir; Yang, Bohan; Balasch, Josep; Verbauwhede, Ingrid
Published in: Issue 4, 2016
DOI: 10.5281/zenodo.154591

Modular evaluation platform for evaluation and testing of physically unclonable functions

Author(s): Marek Laban, Milos Drutarovsky, Viktor Fischer, Michal Varchola
Published in: 2018 28th International Conference Radioelektronika (RADIOELEKTRONIKA), 2018, Page(s) 1-6
DOI: 10.1109/RADIOELEK.2018.8376359

A Closer Look at the Delay-Chain based TRNG

Author(s): Milos Grujic, Vladimir Rozic, Bohan Yang, Ingrid Verbauwhede
Published in: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, Page(s) 1-5
DOI: 10.1109/ISCAS.2018.8351222

A comprehensive hardware/software infrastructure for IP cores design protection

Author(s): Brice Colombier, Lilian Bossuet, Ugo Mureddu, David Hely
Published in: 2017 International Conference on Field Programmable Technology (ICFPT), 2017, Page(s) 263-266
DOI: 10.1109/FPT.2017.8280156

An Efficient Side-Channel Protected AES Implementation with Arbitrary Protection Order

Author(s): Hannes Gross; Stefan Mangard; Thomas Korak
Published in: Issue 3, 2017
DOI: 10.5281/zenodo.574261

Efficient design of Oscillator based Physical Unclonable Functions on Flash FPGAs

Author(s): Ugo Mureddu, Oto Petura, Nathalie Bochard, Lilian Bossuet, Viktor Fischer
Published in: 2017 IEEE 2nd International Verification and Security Workshop (IVSW), 2017, Page(s) 146-151
DOI: 10.1109/IVSW.2017.8031560

A survey of AIS-20/31 compliant TRNG cores suitable for FPGA devices

Author(s): Oto Petura, Ugo Mureddu, Nathalie Bochard, Viktor Fischer, Lilian Bossuet
Published in: 2016 26th International Conference on Field Programmable Logic and Applications (FPL), 2016, Page(s) 1-10
DOI: 10.1109/FPL.2016.7577379

Prefetch Side-Channel Attacks: Bypassing SMAP and Kernel ASLR

Author(s): Daniel Gruss; Clémentine Maurice; Moritz Lipp; Stefan Mangard; Anders Fogh
Published in: Issue 4, 2016
DOI: 10.5281/zenodo.375513

Practical Key-Recovery Attack on MANTIS-5

Author(s): Christoph Dobraunig; Maria Eichlseder; Daniel Kales; Florian Mendel
Published in: 2519-173X, Issue 3, 2017
DOI: 10.5281/zenodo.574265

Physically Unclonable Function Using CMOS Breakdown Position

Author(s): Kai-Hsin Chuang; Erik Bury; Robin Degraeve; Ben Kaczer; Guido Groeseneken; Ingrid Verbauwhede; Dimitri Linten
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.571735

Drammer: Deterministic Rowhammer Attacks on Mobile Platforms

Author(s): Daniel Gruss; Clémentine Maurice; Victor van der Veen; Herbert Bos; Kaveh Razavi; Cristiano Giuffrida; Yanick Fratantonio; Martina Lindorfer; Giovanni Vigna
Published in: Issue 4, 2016
DOI: 10.5281/zenodo.375506

Platform for Testing and Evaluation of PUF and TRNG Implementations in FPGAs

Author(s): Marek Laban; Milos Drutarovsky; Viktor Fischer; Michal Varchola
Published in: Issue 4, 2016
DOI: 10.5281/zenodo.163283

Reconciling d+1 Masking in Hardware and Software

Author(s): Hannes Gross; Stefan Mangard
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.897934

Another Flip in the Wall of Rowhammer Defenses

Author(s): Daniel Gruss, Moritz Lipp, Michael Schwarz, Daniel Genkin, Jonas Juffinger, Sioli O'Connell, Wolfgang Schoechl, Yuval Yarom
Published in: 2018 IEEE Symposium on Security and Privacy (SP), 2018, Page(s) 245-261
DOI: 10.1109/SP.2018.00031

Fast Leakage Assessment

Author(s): Oscar Reparaz; Benedikt Gierlichs; Ingrid Verbauwhede
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.897902

The impact of pulsed Electromagnetic Fault Injection on true random number generators

Author(s): Madau, Maxime; Agoyan, Michel; Balasch, Josep; Grujic, Milos; Haddad, Patrick; Maurine, Philippe; Rozic, Vladimir; Singelee, Dave; Yang, Bohan; Verbauwhede, Ingrid
Published in: Issue 1, 2018
DOI: 10.5281/zenodo.1434074

Complete activation scheme for FPGA-oriented IP cores design protection

Author(s): Colombier , Brice; Mureddu , Ugo; Laban , Marek; Petura , Oto; Bossuet , Lilian; Fischer , Viktor
Published in: https://hal-ujm.archives-ouvertes.fr/ujm-01588947, Issue 2, 2017
DOI: 10.5281/zenodo.574260

Optimization of the PLL based TRNG design using the genetic algorithm

Author(s): Oto Petura, Ugo Mureddu, Nathalie Bochard, Viktor Fischer
Published in: 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017, Page(s) 1-4
DOI: 10.1109/ISCAS.2017.8050839

Complete activation scheme for IP design protection

Author(s): Colombier, Brice; Mureddu, Ugo; Laban, Marek; Petura, Oto; Bossuet, Lilian; Fischer, Viktor
Published in: https://hal-ujm.archives-ouvertes.fr/ujm-01575569, Issue 2, 2017
DOI: 10.5281/zenodo.574260

Statistical Fault Attacks on Nonce-Based Authenticated Encryption Schemes

Author(s): Dobraunig, Christoph; Eichlseder, Maria; Korak, Thomas; Lomne, Victor; Mendel, Florian
Published in: Issue 4, 2016
DOI: 10.5281/zenodo.154487

KeyDrown: Eliminating Software-Based Keystroke Timing Side-Channel Attacks

Author(s): Michael Schwarz, Moritz Lipp, Daniel Gruss, Samuel Weiser, Clementine Maurice, Raphael Spreitzer, Stefan Mangard
Published in: Proceedings 2018 Network and Distributed System Security Symposium, 2018
DOI: 10.14722/ndss.2018.23027

Evaluation and monitoring of free running oscillators serving as source of randomness

Author(s): Allini, Elie Noumon; Skórski, Maciej; Petura, Oto; Bernard, Florent; Laban, Marek; Fischer, Viktor
Published in: Issue 1, 2018
DOI: 10.5281/zenodo.1443138

The Monte Carlo PUF

Author(s): Vladimir Rozic; Bohan Yang; Jo Vliegen; Nele Mentens; Ingrid Verbauwhede
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.897887

On-chip jitter measurement for true random number generators

Author(s): Bohan Yang; Vladimir Rozic; Milos Grujic; Nele Mentens; Ingrid Verbauwhede
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.897896

Cryptanalysis of Simpira v1

Author(s): Christoph Dobraunig; Maria Eichlseder; Florian Mendel
Published in: Issue 1, 2017
DOI: 10.5281/zenodo.375528

Evariste III: A new multi-FPGA system for fair benchmarking of hardware dependent cryptographic primitives

Author(s): Bochard, Nathalie; Marchand, Cedric; Petura, Oto; Bossuet, Lilian; Fischer, Viktor
Published in: Workshop on Cryptographic Hardware and Embedded Systems, 2015
DOI: 10.5281/zenodo.61294

Sources of Randomness in Digital Devices and their Testability

Author(s): Fischer, Viktor
Published in: Random Bit Generation Workshop 2016, 2016
DOI: 10.5281/zenodo.58127

D6.2 - Project Quality Plan

Author(s): Corinna Kudler; Kathrin Assmayr; Martin Deutschmann; Nele Mentens
Published in: Issue 62, 2015
DOI: 10.5281/zenodo.801213

D2.1 - Report on Selected TRNG and PUF Principles

Author(s): Martin DEUTSCHMANN; Sandra LATTACHER; Jeroen DELVAUX; Vladimir ROZIC; Bohan YANG; Dave SINGELEE; Lilian BOSSUET; Viktor FISCHER; Ugo MUREDDU; Oto PETURA; Alexandre ANZALA YAMAJAKO; Bernard KASSER; Gerard BATTUM
Published in: Issue 10, 2016
DOI: 10.5281/zenodo.801083

D5.1 - Internal and External IT Communication Infrastructure and Project Website

Author(s): Corinna KUDLER; Martin DEUTSCHMANN; Mario MÜNZER; Felix STORNIG; Thomas KORAK
Published in: Issue 16, 2015
DOI: 10.5281/zenodo.801166

D6.1 - Risk Assessment Plan

Author(s): Sandra Lattacher; Martin Deutschmann; Marion Buchacher; Sandra Moschitz; Jan Seda; Dave Singelee; Viktor Fischer; Bernard Kasser
Published in: Issue 2, 2016
DOI: 10.5281/zenodo.801200

D5.2 - Data Management Plan (DMP)

Author(s): Martin Deutschmann; Corinna Kudler; Sandra Lattacher; Dave Singelee; Ingrid Verbauwhede; Viktor Fischer; Alexandre Anzala Yamayako; Bernard Kasser; Guido Bertoni; Michal Varchola; Gerard Battum
Published in: Issue 2, 2015
DOI: 10.5281/zenodo.801182

Clustering Related-Tweak Characteristics: Application to MANTIS-6

Author(s): Maria Eichlseder, Daniel Kales
Published in: IACR Transactions on Symmetric Cryptology, 2018, ISSN 2519-173X
DOI: 10.13154/tosc.v2018.i2.111-132

Differential Cryptanalysis of Symmetric Primitives

Author(s): Eichlseder, Maria
Published in: Issue 1, 2018
DOI: 10.5281/zenodo.1288325

Security Analysis of PUF-Based Key Generation and Entity Authentication

Author(s): Jeroen Delvaux
Published in: Issue 2, 2017
DOI: 10.5281/zenodo.897914

Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF

Author(s): Cedric Marchand, Lilian Bossuet, Ugo Mureddu, Nathalie Bochard, Abdelkarim Cherkaoui, Viktor Fischer
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Issue 37/1, 2018, Page(s) 97-109, ISSN 0278-0070
DOI: 10.1109/TCAD.2017.2702607

Symbolic Analysis of Higher-Order Side Channel Countermeasures

Author(s): Elia Bisi, Filippo Melzani, Vittorio Zaccaria
Published in: IEEE Transactions on Computers, Issue 66/6, 2017, Page(s) 1099-1105, ISSN 0018-9340
DOI: 10.1109/TC.2016.2635650

From Physical to Stochastic Modeling of a TERO-Based TRNG

Author(s): Florent Bernard, Patrick Haddad, Viktor Fischer, Jean Nicolai
Published in: Journal of Cryptology, 2018, ISSN 0933-2790
DOI: 10.1007/s00145-018-9291-2

Systematic Classification of Side-Channel Attacks: A Case Study for Mobile Devices


Published in: ISSN 1553-877X
DOI: 10.1109/COMST.2017.2779824

Lightweight Prediction-Based Tests for On-Line Min-Entropy Estimation

Author(s): Milos Grujic, Vladimir Rozic, Bohan Yang, Ingrid Verbauwhede
Published in: IEEE Embedded Systems Letters, Issue 9/2, 2017, Page(s) 45-48, ISSN 1943-0663
DOI: 10.1109/LES.2017.2687082

Key Reconciliation Protocols for Error Correction of Silicon PUF Responses

Author(s): Brice Colombier, Lilian Bossuet, Viktor Fischer, David Hely
Published in: IEEE Transactions on Information Forensics and Security, Issue 12/8, 2017, Page(s) 1988-2002, ISSN 1556-6013
DOI: 10.1109/TIFS.2017.2689726

A unified masking approach

Author(s): Hannes Gross, Stefan Mangard
Published in: Journal of Cryptographic Engineering, Issue 8/2, 2018, Page(s) 109-124, ISSN 2190-8508
DOI: 10.1007/s13389-018-0184-y

Spectral features of higher-order side-channel countermeasures

Author(s): Zaccaria, Vittorio; Melzani, Filippo; Bertoni, Guido
Published in: IEEE Transactions on Computers, Issue 1, 2018, ISSN 0018-9340
DOI: 10.5281/zenodo.1134753

Rotational Cryptanalysis in the Presence of Constants

Author(s): Ashur, Tomer; Liu, Yunwen
Published in: IACR Transactions on Symmetric Cryptology, Issue 1, 2016, ISSN 2519-173X
DOI: 10.13154/tosc.v2016.i1.57-70

Breaching the Privacy of Israel’s Paper Ballot Voting System

Author(s): Tomer Ashur, Orr Dunkelman, Nimrod Talmon
Published in: Electronic Voting, Issue 10141, 2017, Page(s) 108-124
DOI: 10.1007/978-3-319-52240-1_7