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Technology for Advanced Microwave Power FET Structures

Objective

At present the limitations in terms of power density, frequency of operation and efficiency determine the capabilities of microwaves to realise low-cost integrated circuits, especially in the millimetre-wave range. The purpose of this work is to improve the high frequency power-handling capability of III-V FETs beyond the present limits by incorporating epitaxial heterostructure layers grown at extremely low temperatures, especially LT-GaAs.
A new type of heterostructure metal insulator semiconductor field effect transistor (MISFET) using a thin gallium arsenic layer grown at extremely low temperature is proposed for power application in the microwave and mm-wave regime.

Growth conditions for low temperature gallium arsenic layers and gluminium arsenic diffusion barriers have been investigated. The materials and electronic properties have been analysed. The structures have then been incorporated into first gluminium arsenic channel field effect transistor (FET) structures and 1 um gate length MISFETs have been fabricated showing a record direct current (DC) IV power product. Latest results are 23.9 W mm{-1}. IV product indicating a class A RF power handling capability of 2.7 W mm{-1}. A 2-terminal gate drain breakdown voltage of 50 V has been obtained and a source drain 3 terminal breakdown voltage of 34 V for a device with 720 mA mm{-1} maximum output current. These results lie clearly outside the limits of the commonly accepted lateral spreading model for power metal semiconductor field effect transistors (MESFET). It is suggested that this is due to the specific properties (like a controlled leakage currently and high carrier recombination rate) of the low temperature gallium arsenic layer. The charge control by the leaky metal insulator semiconductor (MIS) diode has been analysed and presently the stability of these first devices is under assessment.
APPROACH AND METHODS

III-FETs have shown the highest cut-off frequencies and lowest noise figures of all 3-terminal devices. However, their power handling capability is still severely below their intrinsic limit, mainly due to surface-induced breakdown phenomena. Furthermore, for sub-micron gate lengths the conventional technology implies a tightly controlled recess etching process. The proposed structure is an essentially planar GaAs-MISFET structure containing a novel MBE-grown LT-GaAs layer configuration in the gate barrier layer system to improve the gate breakdown characteristics. Thus, two important limitations of the microwave power FET technology will be addressed.

The focus of the program will be on the growth of LT-material containing a large number of recombination centres, its incorporation into advanced high mobility channel GaAs-HFET structures and the demonstration of improved microwave power performance.

For this cross-disciplinary task the consortium brings together complementary skills in the area of heterostructure materials growth and microwave device fabrication (Ulm, Lille), the complex evaluation of novel materials structures (Cardiff), and the detailed evaluation and modelling of microwave FETs (Lille) with know-how gained from past ESPRIT activities.

POTENTIAL

Through the program, insight will be gained into the fundamental power limits of high speed III-V HFETs. Furthermore, the novel structure has the potential of reduced processing complexity compared to conventional MMIC technologies. For this purpose it is planned to exploit the fabrication of such structures on 3" diameter substrates (PICOGICA, Siemens). The structure has the potential to provide a new generic element for next generation microwave power FETs and MMICs.

Coordinator

UNIVERSITÄT ULM
Address
Oberer Eselsberg
89081 Ulm
Germany

Participants (2)

University of Wales, Cardiff
United Kingdom
Address

CF1 3XP Cardiff
Université de Lille I (Université des Sciences et Technologies de Lille Flandres Artois)
France
Address
Domaine Universitaire Scientifique
59655 Villeneuve D'ascq