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Monolithic Optoelectronic Devices on Silicon

Periodic Reporting for period 1 - MODES (Monolithic Optoelectronic Devices on Silicon)

Reporting period: 2016-07-01 to 2018-06-30

Nowadays, microelectronics set the pace for the whole knowledge-based economy and society in terms of the ever-rising demand for mobile devices and the exponentially growing internet data transfer. However, the widening gap between the increasing number of transistors on a single Si chip and the delivered performance indicates the approaching limits of classical device scaling. Additionally, this miniaturization results in severe energy dissipation in the interconnection of devices. A smart way to overcome this emerging power consumption crisis is to avoid heating by replacing the on-chip and/or chip-to-chip electrical interconnects with optical interconnects. Due to their direct bandgap, III-V compounds are ideal for the integration of photonics with Si-based electronics on the very same chip. This would enable large-scale optoelectronics integration hindered so far by coupling- and overlay issues introduced by state-of-the-art III-V bonding on Silicon.
The foreseen impact of MODES on the European excellence and competitiveness is manifold:
- Impact in Science and Technology would be tremendous if it is possible to overcome the present limitations in local self-aligned III-V integration on Si. Naturally, this will be an enabler for photonic interconnects, which is the prime focus of MODES.
- Europe has a strong research community and approx. 5000 SMEs active in Photonics, hence, breakthroughs achieved within MODES would contribute to the development of new applications within this field, thus, to the growth of the respective industries in Europe.
In MODES, a solution for III-V optoelectronic integration on Si is addressed by extending a novel approach developed at IBM (Template-Assisted Selective Epitaxy) for III-V transistors to the realization of optical devices. The focus of MODES is to develop and investigate this novel approach for self-aligned monolithic integration of active and passive III-V optoelectronic devices on a Silicon platform. It targets on the optimization of GaAs- and InP-based III-V growth within customized oxide templates. Moreover, this research aims at designing and fabricating doped, defect-free III-V heterostructures for electrically-driven optoelectronic devices integrated on Si.
We pursued three scientific and technical objectives such as (1) the growth and integration of III-V material with silicon-on-insulator waveguides, (2) the design and fabrication of passive and active photonic devices based on integrated III-V materials and Si waveguides and (3) the optical and electrical characterization of the photonic components. Moreover, we identified six aims; (i) to design and fabricate oxide templates suitable for the defect-free epitaxial growth of III/V compounds directly on Silicon-On-Insulator (SOI) wafers, (ii) to optimize and characterize the GaAs- and InP-based III/V growth within the oxide templates developed in Aim 1, (iii) to engineer and grow defect-free III/V heterostructures in order to confine charge carriers for efficient light emission and detection, (iv) to fabricate controlled n- and p-type doped sections for the realization of electrically actuated light emitters and detectors, (v) to design, fabricate and optically characterize suitable waveguide geometries, the implementation of grating couplers and cavity designs based on heterostructures developed in Aim 3 and (vi) to obtain a full electrical and optical characterization of the developed and integrated III/V optoelectronic devices.
This report will cover the progress made in the first year of the project, focusing on the development and fabrication of suitable oxide templates as well as the monolithic integration of defect-free III-V materials on Si(001) and optical characterization.
The work performed during MODES includes the template fabrication on Si for growth of heterostructures, i.e. the adaption of the Template-Assisted Selective Epitaxy (TASE) approach for compatibility with growth in integrated optical structures. Furthermore, I fabricated larger template structures in the µm-range as well as high-density arrays suitable for material characterization. The MOCVD growth of several III-V heterostructures was investigated and optimized regarding III-V nucleation, selectivity and composition for material selection. We investigated the n- and p-type doping of III-V ternary alloys using vertical test structures. In addition, we designed III-V mikro-disk cavity structures on Silicon-on-Insulator substrates for optically pumped lasing. The TASE-grown gain material was investigated using high-resolution transmission electron microscopy (HR-TEM), x-ray diffraction (XRD) analysis as well as optical spectroscopy including temperature dependent photoluminescence and Raman spectroscopy.
We successfully demonstrated the monolithic integration of III-V semiconductors for photonic devices on Si based on a selective epitaxial growth technique. This includes direct III-V heteroepitaxy on Si without typical defects such as threading dislocations or antiphase boundaries. We also accomplished optimized template designs and fabrication steps in order to demonstrate the integration of AlGaAs/GaAs microdisk structures as active photonic device material. Optically pumped lasing up to room temperature is achieved along with temperature-stable lasing threshold and lasing peak position.
Dissemination:
The results of MODES have been or will be published in four conference contributions and five scientific journals.
During the duration of MODES I developed fabrication schemes, i.e. design and processing of hollow oxide templates, that enables the direct epitaxy of monocrystalline, um-large III-V microdisks on Si(001) with high optical quality. As a consequence, monolithic integration of GaAs-based microdisk lasers on Si using template-assisted selective epitaxy was demonstrated. These devices exhibit lasing action up to room temperature and low lasing thresholds. The shown integration path of III-V gain material and photonic devices on Si(001) opens a new way towards electrically actuated lasers for merging electronics with photonics in order to reduce power consumption and to enrich the functionality of future Si integrated circuits.
The current European market in Si photonics is dominated by datacom players (ST, Thales, Caliopa, III-V Labs, etc.) driven by ever increasing need for bandwidth, as required by smartphone and cloud functionality. Silicon photonics is regarded as the optical technology that will resolve the future interconnect bandwidth bottleneck in data-centers and high-performance computing moving communication into the terabit era. The demonstrated monolithic integration path of III-V lasers sources on Si might allow photonics to enter the microelectronics fab chain, sharing fab lines with CMOS in the microelectronic foundries. The latter is the prerequisite for Si photonics to become truly an ubiquitous “more-than-Moore” technology, and as widely adopted as mainstream electronics. For the European society such a revolution would add significant value through strengthen industrial competitiveness in
one of the most important industries for the future making the 21st century that of the photon. Moreover, future detectors, modulators and switches based on the presented results of MODES are already listed as “key nanophotonic devices for European research, development and commercial exploitation”.
Sketches and SEM images of the monolithically integrated GaAs microdisks on Si.