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Universal microwave photonics programmable processor for seamlessly interfacing wireless and optical ICT systems

Periodic Reporting for period 4 - UMWP-CHIP (Universal microwave photonics programmable processor for seamlessly interfacing wireless and optical ICT systems)

Reporting period: 2022-01-01 to 2022-12-31

For ICT systems to cope with rapidly increasing traffic growth rates there is a need for a flexible, scalable and future-proof solution for seamlessly interfacing the wireless and photonic segments of communication networks. In addition, emerging paradigms such as 5G/6G communications,
Internet of Things (IoT), autonomous driving, etc. are expected to exacerbate this pressure even further. The requirements demanded by most of these scenarios call for novel technology developments in both the physical layer and the network architectures and this is the main issue being addressed by the project.
RF or Microwave photonics (MWP) is a technology that brings together the worlds of radiofrequency (RF) engineering and optoelectronics interfacing these highly dissimilar media. The major challenge in MWP research is therefore to reduce their cost, size, weight and power consumption (SWaP) while providing flexible and reconfigurable operation. Achieving this will constitute a ground-breaking milestone with dramatic scientific, societal and economic impacts.
UMWPCHIP project goes beyond the current state of the art by pioneering the novel field of Integrated Microwave Photonics (IMWP), which targets the incorporation of MWP components/subsystems in monolithic or hybrid photonic circuits. The activity in IMWP to date has almost exclusively focused on the so-called Application Specific Photonic Integrated Circuit (ASPIC) paradigm, where a particular circuit and chip configuration is designed to optimally perform a particular MWP functionality. As a result, there are almost as many technologies as applications and, due to this considerable fragmentation, the market for many of these application-specific technologies is too small to justify their further development into cost-effective industrial mass-volume manufacturing processes.
The groundbreaking nature of UMWPCHIP resides in its radically different technical approach: rather than following the ASPIC paradigm, the project aims to develop a universal MWP signal processor architecture based on a photonic waveguide mesh that: a) can be integrated on a chip, b) features parallel input/output operation and c) is capable of performing all the main functionalities by suitable software programming of its control signals. UMWPCHIP is inspired by the similar flexibility principles of Digital Signal Processors (DSPs) and Field Programmable Gate Arrays (FPGAs) in electronics, where a common hardware is shared by multiple functionalities through a software-defined approach (or programmability).
The overall objective of UMWPCHIP is the design, implementation and validation of a universal integrated microwave photonics programmable signal processor.

Research activities within UMWPCHIP are structured into three workpackages. The first one deals with main theoretical and design aspects related to the top-level architecture of the MWP signal processor and its optical core, addressing as well the optimization and the drafting of specifications to be employed in its fabrication, assembly, testing and experimental demonstrations. The second, takes charge of the chip mask design, fabrication, packaging and testing of the processor and finally, the third wordpackage deals with the experimental demonstration and validation of the processor for a set of application functionalities.

Most of the activity carried in WP1 is connected to the top-level architecture of the MWP signal processor. Among possible options, we would like to emphasize the Field Programmable Photonics Gate Array (FPPGA) option, whereby the waveguide mesh is integrated with a set of input/output ports and several high-performance blocks (HBBs) that surround it. HPBs can include sources, modulators, detectors or specialized photonic circuits. The FPPGA concept is a completely original derivation of this project.

The work related to the chip mask design, fabrication, packaging and testing of the processor has been carried with CEA-LETI foundry in the first run of the silicon photonics waveguide mesh core, while AMF has been in charge of the dedicated run on the overall processor. In parallel. WP3 will focus on providing the specifications and requirements for the measurement protocols of the full processor in several MWP application scenarios. Required additional RF components have been identified and procured.
The research activities carried out in the first two and a half years of UMWPCHIP have led to the following main advances beyond the state of the art:

• First multifunctional integrated hexagonal waveguide mesh in Silicon on Insulator technology capable of experimentally demonstrating over 30 different functionalities, including programmable Finite (FIR) and infinite impulse response (IIR) filtering, true time delaying, tunable beamforming by phase shifting and multiport interferometer emulation.
• First proposal and experimental demonstration of dual drive tunable directional couplers as elementary building blocks capable of the independent setting of amplitude and phase and their integration into the first-ever reported triangular waveguide mesh fabricated in Silicon Nitride.
• First-ever derivation and patenting of an analytic method to compute the scattering matrix of a two-dimensional photonic integrated device with full coupling in the X and Y axis. The fact that the method is analytic and not numerical allows a high-speed calculation time of the transfer function of multiport 2D devices, which is essential for further monitoring and control tasks.
• The proposal experimental demonstration and patenting of a new device, the Field Programmable Photonic Gate Array (FPPGA), which can be applied to MWP field but also in other areas such as quantum information processing, artificial intelligence and sensing.
• The first-ever development and experimental demonstration of multipurpose optimization techniques for the monitoring, control, and resource setting and programming of large-scale waveguide mesh circuits. The methods can rely either on prior measurement or calibration of the hardware elements or run without prior knowledge of the processor settings. These techniques combine the fast analytic scattering matrix method and refined population and machine learning optimization algorithms.
Complete end-to-end models for the design of FPPGA devices incorporating photonic, electronic and RF elements.
• Complete design and fabrication of a FPPGA featuring a silicon-on-insulator core with over 20 hexagonal cells and over 200 tuning elements, a complete electronics monitoring and driving unit, and Fiber optics and RF input/output ports.

During the six months extension of of UMWPCHIP, we completed the the following research results and progress beyond the state of the art:

• The demonstration of the above FPPGA device in several different MWP functionalities from the following list: filtering, beamforming, arbitrary waveform generation, 5G signal processing, switching, and true time delaying and performance operation complying with the RF metrics limited by state of the art integrated components.
• The demonstration of the same FPPGA device in other fields of applications, including the emulation of programmable multiport interferometers and the implementation of two or more simultaneous functionalities in the same hardware.
• The demonstration of the self-healing, autorouting and optimization capabilities of the FPPGA device.
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