Requirements. We defined the main project requirements during the first months of the project: hardware support for predictability and observability. We also defined the main statistical and machine-learning techniques to be used in the project.
Case Studies/Benchmarks. We proposed a benchmarking approach for SoA autonomous driving platforms in accordance with structural design and functions of AD systems. In addition, we ported a space case study in an embedded GPU, showing the feasibility and effectiveness of existing space algorithm acceleration using GPUs.
Toolchain. We developed a baseline simulation infrastructure featuring state-of-the-art architectural support and industry-level accuracy.
Modelling. We developed timing models for crossbar interconnects resulting in tighter bounds. We also present better modeling approaches for the different parameters of a network on chip-interconnect. For buses, we propose an ILP formulation for computing the worst-case contention delay suffered by a task due to interference.
Analysis. We developed a technique to handle the variability in the values of hardware event monitors when running several times in the same experiment. For probabilistic WCET analysis, we show how survivability-analysis theory can help in producing tighter bounds. We also proposed a novel technique based on Markov’s Inequality for probabilistic WCET analysis that shifts away from previous approaches based on Extreme Value Theory (EVT). We showed the main gaps for the analysis of AD applications for their adoption in critical systems. This includes an analysis of the main sources of non-determinism. We showed how statistical analysis can be used to model the timing analysis of AD software. We showed how AD applications can be adapted to fully exploit the performance of the different computing elements in advanced hardware. We produced the first survey on the use of probabilistic worst-case analysis in the literature and also of multicore processors and GPUs. The statistical analysis used in the project allowed us to model other metrics of interest like worst-case energy consumption, power peaks, and hardware faults. Moreover, we developed a methodology used together with software randomization, a probabilistic WCET enabler, which allows computing the resource allocations in terms of memory and timing budget.
Characterization and Observability. We showed the main challenges for the characterization of complex AD applications to derive metrics like time and memory usage. We also showed how micro-benchmarks can be used to derive bounds to space applications in representative boards in that domain. At the hardware level, we dig down into some of the uncertainty coming from readings of hardware event monitors which can be subject to unexpected behavior and propose two methodologies to increase the confidence in their correct behavior.
Hardware Support. We show GPU configurations that are appropriate for automotive setups. We proposed several hardware techniques to track contention delay rather than events as a way to improve the accuracy in the contention cycles. We addressed the main memory, cache coherence, and GPUs. We propose a cache write policy that reconciles the benefits of high-performance and real-time policies. We proposed a performance monitoring unit for safety-critical systems.
The results listed above were published in peer-reviewed journals and conferences in the area of real-time systems. This includes conferences like IEEE RTSS (Real-Time System Symposium) and Euromicro ECRTS (Conference on Real-Time Systems). These works have been also disseminated in workshops and specific events organized by experts in the area. Some ideas are now being pursued in other projects with higher TRL. For the software technologies, we are in contact with companies in the area (e.g. avionics) as they have shown interest in the results obtained.
