Objective The project's objectives are: - To design a suitable interface and interconnect for integration of processor and co-processor on a single chip for both current and future generation transputers. In the first instance work will be centred on developing a co-processor for the transputer macrocell developed in OMI-TMP, for high volume, low cost, embedded applications. On chip FPGA will form a useful prototyping facility and is expected to be economic for production runs up to around 5k units. In a second workpackage, the FPGA co-processor integration will be more tightly coupled, as it will be integrated into the transputer architecture from design time. - To produce a suitable software environment for ease of configuration and communication. - Writing a simulator/emulator in order to model the interaction of processor and FPGA. - To manufacture prototypes. - Write application specific configuration code and create suitable libraries for identified applications. - To evaluate the final implementations. - To identify further applications for reconfigurable co-processors.This project aims to explore the potential of exploiting Field Programmable Gate Array (FPGA) technology to produce reconfigurable co-processors. The intention is to design, manufacture and evaluate prototype chips to integrate a microprocessor and co-processor. It is hoped to demonstrate that an integrated microprocessor and FPGA, together with software tools, provide a flexible and efficient solution to computationally intensive problems where a specialised co-processor is needed. The reprogrammability of FPGA's also allows for rapid prototyping and ease of upgrade. Furthermore, programming the FPGA's can be easier by compiling configuration code from high level languages allowing problem specific hardware to be generated from a software process. Integrating reconfigurable co-processors is a new idea which opens up all sorts of potential markets. There are potential applications in multi-media, automotive, image-processing, to name just a few. It is with this in mind that the project is intended to be application driven. This provides a definite focus in what is a very new field and ensures that the key developments are commercially relevant for all concerned. Fields of science natural sciencescomputer and information sciencessoftwareengineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardwarecomputer processors Programme(s) FP3-ESPRIT 3 - Specific research and technological development programme (EEC) in the field of information technologies, 1990-1994 Topic(s) Data not available Call for proposal Data not available Funding Scheme Data not available Coordinator Inmos Ltd EU contribution No data Address 1,000 Aztec West BS12 4SQ Almondsbury United Kingdom See on map Total cost No data Participants (4) Sort alphabetically Sort by EU Contribution Expand all Collapse all Aptor SA France EU contribution No data Address 61 chemin du Vieux Chêne 38244 Meylan See on map Total cost No data European CAD Developments Ltd United Kingdom EU contribution No data Address Bagshot Road RG12 3PH Bracknell See on map Total cost No data GIE PSA PEUGEOT CITROEN (EX GIE PSA ETUDES ET RECHERCHES) France EU contribution No data Address AVE. DE LA GRANDE ARMEE, 75 75116 PARIS See on map Total cost No data Science Research Foundation United Kingdom EU contribution No data Address 10 Priory Road BS8 1TX Bristol See on map Total cost No data
