Smart multilevel Power conditioning for AeRonautical elecTricAl uNits

Project Information

SPARTAN

Grant agreement ID: 821381

DOI 10.3030/821381

Closed project

EC signature date 22 October 2018

Start date 1 November 2018

End date 30 April 2022

Funded under

• SOCIETAL CHALLENGES - Smart, Green And Integrated Transport

Total cost € 744 634,19

EU contribution € 587 637,33

Coordinated by

EDAIR TECHNOLOGIES SL
Spain

Periodic Reporting for period 3 - SPARTAN (Smart multilevel Power conditioning for AeRonautical elecTricAl uNits)

Reporting period: 2020-11-01 to 2022-04-30

Summary of the context and overall objectives of the project

This proposal aims to develop and demonstrate a highly robust and reliable Intelligent Power Modules (IPMs) for the power conditioning of multiple electrical sources on an aeronautical environment, optimally integrated into the electrical power generation system of the aircraft.

Specific objectives:

1. Development of high performance and efficiency IPMs with a minimum impact on the size and weight of the systems.

2. Achieve a high performance based on the use of high-efficiency wide bandgap semiconductors and its integration in the most suitable multilevel topology.

3. High reliability and robustness based on a modular multilevel approach besides its interleaved topology.

4. Achievement of a high modularity and scalability with a high percentage of common design of the AC/DC and DC/DC modules (almost equal converters), optimizing thus the integration of both power stages, the manufacturing process and the Mean Time Between Repair.

5. Providing a full controllability of both power stages to higher hierarchical controller based on an advanced hardware/software architecture scheme with a multi-core approach (FPGA + DSP+ARM) that fully control each power module with a high bandwidth capacity.

6. Development of a specific modulation to obtain the highest performance of the proposed topology, optimizing the desired parameters (efficiency, losses, …)

Work performed from the beginning of the project to the end of the period covered by the report and main results achieved so far

The development of high performance and efficient MIP, with a minimum impact on the size and weight of the systems, includes an adequate design based on advanced topologies that allow a minimization of the passive components in terms of size and weight.
Two main lines are pursued: the use of broadband semiconductors and a multilevel topology to reduce the size of passive elements, such as filters.
These two issues have been developed throughout the project. By selecting components and focusing on the analysis of broadband semiconductors. In the Module Architecture Definition, the multilevel topology has been analyzed. In addition, functional models of the preliminary design, based on minimizing size and weight, are currently being developed to achieve high performance based on the use of high-efficiency broadband semiconductors and their integration into the most appropriate multilevel topology. On the other hand, the optimization of passive filters, in order to increase efficiency.
Broadband semiconductors have been analyzed and thanks to the nature of these, the switching frequency can be significantly increased compared to conventional technology. Therefore, the size and weight of the passive elements can be reduced. The appropriate switching frequency is defined in the design to minimize these elements which comprise a high percentage of the size and weight of the converter.
The high reliability and robustness based on a multilevel modular approach, its interleaved topology, eliminates the affected module in case of failure or divides the power in the other available branches, avoiding an interruption of the operation.
The operating modes will manage the configuration of the topology under a cell failure that bypasses it. This also affects the design of the cell and its integration into the topology so that it can be easily bypassed.
A high modularity and scalability with a high percentage of common design of AC/DC and DC/DC modules (almost equal converters), optimizes the integration of both power stages, the manufacturing process and the average time between repairs.
All work is based on the use of similar cells for both DC/DC and DC/AC. The semiconductors analysed will be similar for both converters, as well as the derivation strategy followed by the converters' operating modes in case of failure. In addition, the following has been taken into account for the preliminary design
A superior hierarchical controller will provide full control of both power stages, based on an advanced hardware/software architecture with a multi-core approach (FPGA + DSP+ARM) that fully controls each power module with a high bandwidth capacity. The built-in electronics have advanced protection and fault management features, for fast response and implementation of autonomous and/or emergency strategies
The multi-core approach has been analysed and high performance processors have been chosen. The difference is the lower level that will depend on the final control and modulation strategy, the simulation tests will also help to choose the best option.
The preliminary design is at a schematic level, as the other levels are being delayed due to the development of the power stage,the project has made some progress in the detailed design and at this status waiting from final feedback from SAFRAN.
Based on the preliminary design, the detailed design is carried out (mechanical, electrical, thermal), and detailed cad drawings including final safety analysis, prior to launch equipment manufacturing. The following issues will be covered:
- Mechanical, electrical and thermal design of the power stage.
- PCB design of the hardware electronics
- support and verify all the issues related to the semiconductors, especially in the case of the drivers.
- Software design and development of the software
- Implementation of the modulation algorithms by the
- Communication design by HESS supported by Edair.
- Manufacture of all electronics and IPM
- Test campaign associated with IPM

Progress beyond the state of the art and expected potential impact (including the socio-economic impact and the wider societal implications of the project so far)

The expected impacts of the projects, included in a table in section 2.1 of the proposal are still relevant.
Specifically, the design is performed oriented towards the technological objectives: increase of the performance and efficiency; multilevel architecture with interleaving topologies, reduction of voltage and stress in semiconductors and increase of the robustness and reliability of the power conditioning. The measure indicators will be checked after the design of the converter and later when tested.
Specific actions regarding scientific and academicals and market objectives are still to be performed, but it is still relevant.
Environmental objectives will be also check after the testing of the power converters.

Main Control Level DPS Block