Periodic Reporting for period 1 - SERENITY-X (SERENITY-X – Accelerating AI)
Reporting period: 2021-02-01 to 2023-01-31
We adapted the existing technology (based on an ATCA rack-mount form factor) into a standalone “pizza box” design, which was used for demonstration purposes and small scale testing with potential customers. We extended our product offering by developing a very low cost readout board, using the same underlying software and firmware frameworks which can be applied for small scale testing, teaching and even distributed co-processing. This allows us to show the strength of our developments whilst also deploying high level (AI based) algorithms independent of the underlying hardware.
Chip emulation is a key area where our technology would be very well suited, in particular the data management and meshing that is strongly required in this cutting edge domain. Given the economic stress of the pandemic and still prevalent component shortages the requirements on emulation are increased. We believe our solution could benefit greatly smaller scale enterprises that cannot afford to invest the time and resources in full-scale emulation and fast fabrication.
An emerging area of application is the interface between quantum computers and classical computation. Here an extremely asynchronous ethernet-like connection will be required. We believe the complexity, data throughput with sufficient buffering is very well suited to our technology which can act as middleware and control of the interconnect.
We explored technological partnerships and setting up of a commercial entity both at CERN and in-house at Imperial and felt that SERENITY-X should be handled under the broader HEP-X entity at Imperial College – facilitating multi-disciplinary application whilst sharing the common effort required. We have also recently entered into agreement to provide Multiwave Metacrystal SA with a read-out system for their next generation clinical PET detector, exploiting very fast and multi-material scintillators, called metascintillators.
Our core technology – high throughput (up to 10Tb/s), fixed and low latency on a flexible and adaptable architecture for both hardware and firmware – is very suitable to a number of applications. The fact that our approach can be cost optimized is particularly beneficial for developing and emerging markets and also societies, especially in the areas of healthcare and smaller scale electronic development.