Skip to main content

Optical Interconnection for VLSI and High Bit-Rate ICs

Objective

The inherent wide bandwidth and crosstalk immunity of optical transmission media permits very high bit rate signals to be distributed, overcoming the transmission line and r.f.interference problems encountered with very high bit-rate ICs. Many lower bit- rate signals, each of which would conventionally employ a package pin, can be time-multiplexed together to form one easily transmitted, high bit-rate optical signal which leaves the package via a single optical pin, thus avoiding very high pin counts for VLSI chips. Many processor architectures require a high density of long-range interconnections which, when implemented conventionally, can cause major interference, signal degradation and space consumption problems when integration into compact systems orincreased bit-rates are required. Optical interconnection offers a way of overcoming these problems.
The objective of project986 was to demonstrate the potential advantages of optical interconnection technologies for high bit-rate signals in electronic assemblies such as circuit boards and other assemblies of an equivalent integration level, and to exam ine some of the technological and practical aspects of implementing optical interconnection.
The objective of project 986 was to demonstrate the potential advantages of optical interconnection technologies for high bit rate signals in electronic assemblies such as circuit boards and other assemblies of an equivalent integration level, and to examine some of the technological and practical aspects of implementing optical interconnection.

The project was divided into 4 distinct tasks. Task A was directed towards the design, construction and evaluation of an optical interconnection demonstrator comprising a significant circuit/processor function and using optical connection at data rates lower than 1 Gbit/s.

Testing of the demonstrator showed error free operation at above 600 Mbit/s, although timing tolerances and power budget were critical.

Task B was directed towards the design and evaluation of short haul optical links operating at up to 5 Gbit/s.

The conclusion is that optical integrated circuit (OIC) bit rates above 2 Gbit/s are not attractive.

Task C was directed towards the development of planar waveguide technology suitable for optical interconnection on printed circuit boards or in hybrid packages.

Task D had 2 main areas of investigation. The first was concerned with detector and emitter devices and the interfacing of these to waveguides, and the second with the computer architecture implications of optical interconnection.

The overall conclusion of the project was that planar optical interconnection is useful where track lengths exceed 10 mm, track densities exceed 10 per mm, and bit rates exceed 100 Mbit/s; upper limits to these parameters are roughly one order of magnitude higher.
The project was divided into four distinct tasks:
Task A was directed towards the design, construction and evaluation of an optical interconnection demonstrator comprising a significant circuit/processor function and using optical connection at data-rates lower than 1 Gbit/s. The implementation was basedon hybrid circuit technology assembled on printed circuit boards, and employed an optical fibre link designed to transmit data without any format restrictions (ie operation down tod.c.).
The main activities were to design and build high-speed optical transmitters and receivers and 16:1multiplexers and demultiplexers. Appropriate protocols for the signalling circuits were also selected, and interfaces to the processing functions construct ed which were predominantly further stages of multiplexing from the processor bit-rate. The hybrid multiplexers and demultiplexers were built, and were evaluated at data-rates up to 2Gbit/s. Testing the transmitters and receivers up to 1Gbit/s also tookplace. These modules were assembled to form an optical interconnection demonstrator to explore the advantages, disadvantages and limitations of time-multiplexed optical interconnection.
Finally, testing of the demonstrator showed error-free operation at above 600Mbit/s, although timing tolerances and power budget were critical.
Task B was directed towards the design and evaluation of short-haul optical links operating at up to 5Gbit/s. The main impetus of this work was to examine the limitations of high bit-rate optical links designed for operation with unformatted data and wit h as simple a receiver as possible, since low cost and power consumption are essential if optical links are to play a part in communications between VLSI chips.
The conclusion is that except for special requirements, such as when the basic circuits operate at gigabit rates, OIC bit-rates above 2Gbit/s are not attractive, and in many cases it is expected that less than 1Gbit/s will be more cost effective, depending on multiplexer technology. As a result, work on this task was terminated in June1987.
TaskC was directed towards the development of planar waveguide technology suitable for optical interconnection on printed circuit boards or in hybrid packages, and specifically for hybrid technologies in which a printed optical circuit is formed on a sub strate and emitters and detectors are coupled directly to the waveguide. A number of waveguide technologies were assessed:
-polymer
-screen-printed glass
-deposited SiO2/Si3N4/GeO2 waveguides
-ion-exchanged waveguides.
The lowest loss obtained was 1dB/cm on SiO2 guides. Wavelength division multiplexers were demonstrated using dichroic filters into multimode Yjunctions.
Task D had two main areas of investigation. The first was concerned with detector and emitter devices and the interfacing of these to waveguides, and the second with the computer architecture implications of optical interconnection.
The requirements for detector and emitter devices, the performances that might be expected from these devices, and the integration of them with standard silicon VLSI processing were all considered. On the architectural side, various types of advanced processor systems were considered. The Single Instruction Multiple Data (SIMD) array processor was identified as a particular application in which optical interconnection should be assessed.
The overall conclusion of the project was that planar optical interconnection is useful where track lengths exceed10 mm, track densities exceed 10 mm-1, and bit-rates exceed 100 Mbit/s; upper limits to these parameters are roughly one order of magnitudehigher. At the lower end of the range, at least miniature microstrip offers comparable performance. Whilst fixed interconnection is likely to be the only viable option at chip and board level for a number of years, the data transparency of optical switching makes reconfigurable interconnection a very interesting area for future research.

Coordinator

GEC Marconi Research Centre
Address
West Hanningfield Road Great Baddow
CM2 8HN Chelmsford
United Kingdom

Participants (2)

Telettra SpA
Italy
Address
Via Tremo 30
20059 Vimercate Milano
University of Southampton
United Kingdom
Address
Highfield
SO9 5NH Southampton