Development of a new measuring technique for the detection of subsurface damages while using the ductile regime mode for grinding silicon wafers Minimization of the fault layer thickness, i.e. subsurface damage (< 1µm), Achievement of high surface quality (Ra < 0,05µm) and part accuracy (TTV < 2µm), Guaranteed reproducibility of the achieved results (process stability and reliability), Development of an innovative Twin-Spindle for achieving a multi-step machining operation.
Objectives and content
Hyperpure silicon is utilised in virtually all
applications in the fields of electronics and
microelectronics. These markets are growing at a
breathtaking pace. Industrial manufacture - from
hyperpure silicon crystals to undoped slices of
semiconductor chip carriers, so-called wafers - is today
still characterised by time consuming and cost intensive
work processes. Lapping and polishing operations account
for over 40% of the manufacturing cost of a silicon
wafer. This leaves enormous potential for increasing the
economic efficiency of the wafer machining process.
Within the workprogramme of the project BestWafer the
cost of undoped silicon wafers can be reduced in short
term by less than 25% applying a low damage grinding
technique. It could signal the end of the need for the
separate steps of lapping, etching and polishing.
The general aims of the project are as follows:
Development a new rotation grinding technology, i.e. a
prototype system for the manufacture of 300mm wafers and
Reduction of the overall manufacturing cost of
microelectronic parts (microchips, IC units) and
Securing and developing the technological
competitiveness of Europe in the worldwide market of
A project with such an innovative character is of
strategic importance to the European Union. This applies
particularly in view of the need to create and retain
skilled workplaces in the EU and to resist the fierce
competition from non-European countries (USA and Japan).
A successful project BestWafer can revolutionise the role
of the European semiconductor manufacturing sector in
international competition. It is vital to occupy
strategic key technologies such as the semiconductor
sector if Europe is to remain a strong and economically
To reach these goals the results obtained in the project
must meet the following requirements:
Minimisation of the thickness of the fault layer, i.e.
subsurface damage (< 1mm),
Achievement of high surface quality (Ra < 0,05mm) and
part accuracy (TTV < 2mm) and
Guaranteed reproducibility of the working results
(process stability and reliability).
The following workprogramme will ensure the successful
development of a virtually damage-free grinding prototype
system for the manufacture of silicon wafers:
Fundamental investigation into ductile grinding of
Development of technology for virtually damage-free
grinding of hyperpure silicon,
Design of process stages for pre-machining,
Design, development and implementation of an innovative
spindle system and
Investigations of a reliable and steady-state process.
Funding SchemeCSC - Cost-sharing contracts