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Fast and novel manufacturing technologies for thin multicrystalline silicon solar cells - (FANTASI)

Objective

Objectives:
As stated in the 5th FWP, the cost targets for PV systems are 7 and 3 Euro/Wp for the short and medium term, respectively. The aim for the PV module cost is < 1 Euro/Wp by 2010, helping to reach the White Paper target of 3 GWp capacity by 2010. These issues are addressed by the objectives of this proposal. The basic project aim is a significant reduction of the manufacturing cost/Wp by the development of innovative cell structures and related fast (>1dm²/3s) low-stress manufacturing technologies suitable for thin (200 micrometer) EFG Si sheets and multicrystalline Si wafers, leading to efficiencies of 15.0% (EFG) and 16.5% (multi-Si) and a reduction of expensive Si-feedstock consumption to values below 4 gr. Si/Wp. The feasibility of cost reduction has to be validated at the end of the project by verification of the assumptions in the MUSIC -FM study (CT94 0008).
Work performed:
In parallel three alternative texturing processes have been developed. Two of these processes result in an isotropically textured surface. These processes rely on acidic etching solutions. The first texturing process is only suited for multicrystalline wafers that are diced from an ingot because the etching mechanism relies on the saw damage from wafer dicing. Because this process is not suited for EFG Si wafers (no saw damage present) another chemical solution has been developed for EFG wafers. A third texturing technology is based on an alkaline texturing set-up that applies a high cathodic potential by attaching an electrode to the wafer. Thus short-etching times can be achieved and the regime of alkaline etching can be varied in a wide range. While the first two technologies have been successfully applied to the production of solar cells, the third alternative is still on a more fundamental level. Textured surfaces are one of the key features that are required to successfully produce highly efficient solar cells on thin wafers. A wet bench that is suited for isotexturing and pre-diffusion cleaning has been designed and is currently manufactured within the project. Diffusion processes for shallow homogeneous emitters have been developed and optimised resulting reproducibly on target sheet resistance values of about 60 ohm/sq. Alternative attempts to develop selective emitter processes require still more effort in the development of adequate P pastes and the respective processes. Therefore, P pastes have been developed and investigated. These pastes are developed for resulting in respective target emitter sheet resistance values and P surface concentrations when applied in the same optimised diffusion process. Issues like possible Fe contamination and diffusion glass removal after diffusion had to be analysed in more detail. A shallower light receiving emitter region is important if thinner solar cells are to produce high conversion efficiencies. A novel edge isolation mechanism to locally interrupt a parasitic diffusion area at the rear side has been developed. This concept is based on a KOH containing paste that should be applied by a dispenser, dried and subsequently washed off. KOH pastes have been developed by two project partners. The concept allows achieving (at least for one of these pastes) good fill factor values and thus successfully interrupts the diffused area between front and rear side contacts. The biggest advantage of this method is that it is a technology that doe not apply mechanical stress to the wafer. Thus the selective KOH Si etching is suited for thin and fragile large area wafers. Novel metallisation pastes have been developed. New Ag paste formulations allow contacting shallow emitter regions (60 ohm/sq.). The solar cells manufactured with these pastes and shallow emitters showed the potential to result in excellent Jsc and FF values above 76 %. Thus the benefit of selective emitters compared to those shallow emitters is reduced and it is no more a must to go for a selective emitter development. At the same time alternative Al pastes have been developed that reduce the wafer bowing that is resulting from different thermal expansion coefficients of Al and Si after firing. This is very much needed when solar cells are processed from thin (200 µm) large area wafers. It could be shown that the wafer bowing on thin wafers can be reduced to less than 1 mm without loosing in efficiency. Several alternative concepts for the rear side metallisation applying only local rear side contacts have been evaluated and investigated. These concepts for rear side metallisation include boron diffusions from B pastes, SiNx:H passivation and an Al paste firing through the nitride layer. The integration of a local rear contact structure into an industrially advantageous processing sequence will still require more investigations and efforts. A characterisation method that is suited to determine the bulk lifetime and surface recombination velocity of wafers at all stages of the processing sequence has been developed, built up and successfully tested. First processes integrating the advantageous processes and pastes that were developed so far have been executed successfully in an industrial pilot line environment. Results and Dissemination plans: Good progress has been achieved in all work packages of the project.
All deliverables and milestones that were foreseen until the MTA meeting were fulfilled.
- Isotexturing processes have been developed and successfully demonstrated for both, multicrystalline wafers and EFG sheets. A wet bench that is suited for pre-diffusion cleaning and iso-texturing has been developed, designed and is currently under construction.
- P pastes resulting in two different target emitter sheet resistance values and P surface concentrations (A: 1019 P atoms/cm3; B: >1020 P atoms/cm3) when applied in the same optimised diffusion step have been developed and investigated. Samples of a boron paste has been supplied as well.
- Diffusion processes for homogeneous shallow emitter diffusion (60 ohm/sq.) have been developed, applied and optimised.
- An advanced method for the parasitic edge removal applying no stress to the thin wafers has been developed based on a novel KOH paste suited for selective Si and PSG etching. Resulting fill factors of 76% and higher for POCl3 diffused solar cells demonstrate clearly that the parasitic junction removal is successfully performed with this contactless method.
- Ag pastes allowing to contact shallow emitters (60 ohm/sq.) have been developed, supplied to the project partners and successfully applied after optimising the contact firing step.
- Al pastes resulting in lower wafer bowing (= 1 mm bow on =125 x 125 mm2 wafers; full Al BSF) without degrading the Al back surface field (BSF) have been developed and successfully tested.
- A transverse probe double wavelength lifetime measurement set-up has been designed, built up and successfully tested. This set-up is in principle suited to extract and monitor the minority carrier lifetime in the wafer bulk and the surface recombination velocities of the rear and front surfaces and thus will help further process optimisation
- Necessary improvement for handling and metallisation printing of thin wafers has been identified and specified.
- Alternative rear side metallisation schemes applying local rear contacts, rear surfaces passivation and reflector layers and suited isolation processes are under development
- First attempts to run advanced integrated process sequences that are suited for thin mc-Si and EFG wafers have been successfully executed.
- Solar cell efficiencies in excess of 16.1 % have been achieved on thin mc-Si wafers (MTA milestone: > 15.5 %)- Solar cell efficiencies of 14.5% on 200 µm thin and > 15 % on 300 µm thick 100 cm2, 3 ohm cm EFG wafers have been demonstrated (MTA milestone on thin EFG: 14.5 %).The advantageous results will be individually exploited by the respective project partners as described in the TIP (technology implementation plan). Merck and DuPont will try to commercialise the respective developed pastes. Astec will try to commercialise the developed wet bench concept. RWE SCHOTT Solar will try to implement the developed integral processing sequences including iso-texturing and shallow emitters. IMEC will disseminate the developed technologies through journal articles and conference proceedings and offer to transfer the gained know-how to interested PV companies. DIE-UNAP will offer the developed characterisation possibilities as commercially available service for a wider public and publish the scientifically relevant progress. Technion will publish the fundamental scientific know-how that has been gained and apply the etching and texturing technology also to other fields in the micro-electronic sector.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

RWE SCHOTT SOLAR GMBH
Address
Carl-zeiss-strasse 4
63755 Alzenau
Germany

Participants (6)

ASTEC HALBLEITERTECHNOLOGIE GMBH
Germany
Address
Am Roethenbuehl 7
92348 Berg
DUPONT UK LTD
United Kingdom
Address
Coldharbour Lane, Frenchay
BS16 1QD Bristol
INTERUNIVERSITAIR MIKRO-ELEKTRONICA CENTRUM VZW
Belgium
Address
Kapeldreef 75
3001 Heverlee
MERCK KGAA
Germany
Address
Frankfurter Strasse 250
64293 Darmstadt
TECHNION - ISRAEL INSTITUTE OF TECHNOLOGY
Israel
Address
Technion City
Haifa
UNIVERSITA DEGLI STUDI DI NAPOLI FEDERICO II
Italy
Address
Via Claudio 21
80125 Napoli