A novel configuration is proposed for chip-level optical interconnects on processors in order to overcome the communications "bottleneck" associated with reducing chip feature sizes. An opto-electronic overlay Consisting of opto-electronic Chips bonded to a glass waveguiding "ceiling", links the data launch pads. The lasers and receivers with integrated drive circuitry ensure that chip area on the processor is not compromised.
The objective of this project is to fabricate a commercially-viable glass optical "ceiling". Modelling and fabrication trials will investigate the performance of diffractive components defined on glass for coupling of VCSEL lasers to multimode guides and from guides to pin detectors aiming to achieve 25% coupling efficiency for data rates of up to lGb/s. A complete optical ceiling will be designed and fabricated including diffractive couplers, waveguide interconnects, power splitters and interfaces to external fibres, aiming for an interconnection density of 100/cm2.