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Smart optical detectors


Research objectives and content
The integration of photodetecting elements and processing circuits on the same chip by using CMOS technology leads to smart optical sensors. These devices consist of an array of pixels where each of them contains the circuits for signal processing. The most critical type of smart, or active, pixels are the analog where extra circuits are needed for better signal acquisition. This results to high sensitivities. A specific goal is to boost the optical sensitivity of pixels to their limits. One factor in this optimization is technological and cannot be addressed: the spectral response of silicon and the dark current. The other factor is the Signal to Noise ratio related behavior of the accompanying electronics. Here, serious advances must be expected. We therefore, would define the project in two parts: . Study of theoretical and practical limitations of th sensitivity of a pixel-like optical receptor . Design and evaluation of a new generation, ultra-high sensitivity pixel. The ultimate goal is single photon detection and counting.
Training content objective. Benefit and expected impact)
Analog and optical chip design, optical measurements, cryogenic operation and testing of ICs and inside knowledge of sensor systems and driving. ?Familiarization with CAD/CAE tools for IC design and simulation ?Fabrication of ICs with state-of-the-art technologies (submicron CMOS and BiCMOS) ?System development for Digital Signal Processors, FPGAs and microcontrollers. ?Seminars related with microelectronic fabrica circuit design issues
Links with industry / industrial relevance (22)
CCAM(B),BARCO(B),MIETEC-ALCATEL(B),ICOS(B),Traficon(B),Krypton(B),EGEMIN(B), SIEMENS(D),ANTEC(D),KoHartog(NL),PARS(D),E&FC(D),INTEL(USA),BRDI(F),THOMSON CSF(F),Matra Marconi Space(GB),MONITRON(GB),ESA/ESTEC(NL),Philips Research(NL),Hitachi(J),CERN(CH),Knossos Technologies(GR)

Call for proposal

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75,kapeldreef 75
3001 Heverlee

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Participants (1)

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