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Content archived on 2024-05-07



Six research teams from research institutes and industrial sites, leading and of newly developed SiGe materials in advanced devices. "Standard" in the field of low-temperature epitaxial Si and SiGe, will hire young fellows (post-docs) hr. in total 21 Men-Years. An active search for means low x and smooth layers, but with atomically sharp interfaces. Not interested people will be organised within the EU. They will be called in only the bandgap engineering possibilities of SiGe but also the research groups active in the development of SiGe materials and their structural possibilities of epitaxial growth and stacking of layers with application in advanced devices. Next, young researchers from the partners different Ge-and doping content and thickness offer possibilities for improving CMOS performance: improved threshold voltage control, reduced sites can visit the other partners' labs for shorter stays in order to get an overview over the different other technologies.
S/D capacitance, lower power consumption, higher speed etc... Devices envisaged are a selective SiGe channel CMOS process avoiding S/D implant, Vertical MOSFET's (< 0.1 Fm gate length controlled by a layer thickness), Quantum Well SiGe CMOS on SIMOX wafers, poly SiGe gate CMOS. A first novel material is nanostructured Si1-xGex with high x, which structures itself into island while growing due to the excess strain; it forms the base for light emitting diodes. A second material is SiGeC, offering even wider band gap engineering possibilities, for use in high frequency MODFET's. One partner will develop relaxed, smooth SiGe substrates to be used for strained Si as well as SiGe epitaxy. A lot of exchange of wafers, analysis and measurements, and technology is planned, as well as joint theory development.

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Interuniversitair Mikro-Electronika Centrum VZW
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3001 Heverlee

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Participants (7)