Objective
A model of the system under design is to be created before the implementation phase by using only VHDL models and a special component library (SmartModels).
Verification of the functionality of the new system design is to be done only by using a VHDL simulator and component libraries (VHDL and SmartModels). No traditional gate simulator will be used.
Special methods are to be introduced into the system testbench for automating the simulation process and result analysis and therefore improving the efficiency of development work.
Design risks will be minimised, as decisions on architecture can be verified in a rather early stage of the design process.
An earlier failure detection and shorter iteration loops will lead to shorter design periods.
Verification of functional operability of the system to be designed by simulation will reduce the time needed for putting it into operation.
In this Application Experiment a hardware design environment for hardware is to be established for complex PLDs as well as ASICs and PCBs using the same advanced top-down methodology, the same tools and similar flows in the system design before the implementation phase. VHDL which is an international standard was selected to form the basis of the work to be done. The design environment planned will enable us to perform VHDL-based board and system simulations in an early stage of product development.
Fields of science (EuroSciVoc)
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Programme(s)
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Multi-annual funding programmes that define the EU’s priorities for research and innovation.
Topic(s)
Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
Calls for proposals are divided into topics. A topic defines a specific subject or area for which applicants can submit proposals. The description of a topic comprises its specific scope and the expected impact of the funded project.
Call for proposal
Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
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Procedure for inviting applicants to submit project proposals, with the aim of receiving EU funding.
Funding Scheme
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Funding scheme (or “Type of Action”) inside a programme with common features. It specifies: the scope of what is funded; the reimbursement rate; specific evaluation criteria to qualify for funding; and the use of simplified forms of costs like lump sums.
Coordinator
01139 Dresden
Germany
The total costs incurred by this organisation to participate in the project, including direct and indirect costs. This amount is a subset of the overall project budget.