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Systems Engineering for Time-Triggered Architectures

Objective

The overall goal of the SETTA consortium is to push the time-triggered architecture -an innovative European-funded technology for safety-critical, distributed, real-time applications such as fly-by-wire or drive-by-wire - into future vehicles, aircraft, and train systems. To achieve this goal, SETTA focuses on the systems engineering of time-triggered architectures. The key characteristic of time-triggered, distributed real-time systems is that all significant events, including tasks and messages, do not occur at random points in time, but rather have to adhere to a pre-determined schedule. This approach initially requires a larger design effort than classical, event-triggered systems; once built, however, time-triggered systems have several advantages, such as predictability concerning their real-time behaviour, which make them uniquely suited for complex, safety-critical real-time systems.

Work description:
BRAIN provides a broadband extension of cellular systems as GSM/GPRS/EDGE and UMTS up to 20 Mbps for hot spot applications. The BRAIN access network will be based on end-to-end IP for all real time and non real time services in public and private (corporate), licensed and unlicensed networks. The IP based core network connects all involved radio access schemes of the BRAIN architecture in a flexible manner. BRAIN will be applied in pico-cells as in-building and home cells and in urban and suburban cells. However, in the urban and suburban cells no full coverage is envisaged from the beginning. In these areas BRAIN will provide coverage, e.g., in hot spots as campus areas, conference centres, railway stations and airports. Full coverage with reduced data rates is being provided by GSM/GPRS/EDGE and UMTS. Therefore, these systems complement each other depending on the different radio environments and service needs.
For seamless service provision in the entire coverage area mobility functions will be proposed in the BRAIN approach (e.g. horizontal handover) as well as vertical handover between different access networks, e.g., UMTS including the negotiations of data rate and QoS (Figure 6.1). The figure shows the BRAIN vision of a fully IP-based communications network. It includes existing (GSM) and emerging networks, such as UMTS. BRAIN is a broadband extension to these; its radio interface, based on HIPERLAN Type 2 as the physical layer, provides the high speed, hot-spot, coverage with data rates up to 20 Mbps for the user. BRAIN also provides the required architecture to take IP all the way down to the base stations. The figure shows the integration of future and emerging technologies, including fixed-mobile convergence. BRAIN will therefore propose a wide range of integrated services across all these platforms using IP. The BRAIN architecture will include signalling, mobility management, QoS etc. through the extension and analysis of IP protocols and the definition of the HIPERLAN Type 2 convergence layer for IP. The MAC layer of HIPERLAN Type 2 may be adapted to the needs of IP traffic if changes are necessary for an efficient use of the spectrum. The support of QoS in IP based mobile networks is an important issue of research in the BRAIN architecture. All traffic, including voice, is packet based.

Key Issues:
- To define service scenarios based on user requirements and enabled by existing and future technologies;
- To identify the special requirements, including Quality of Service, of existing and evolving IP services and applications in different wireless mobile environments;
- To investigate, define and specify mechanisms for service scalability and application adaptation to support different radio access networks and environments;
- To define local and global mobility management in IP based networks;
- To design and specify mechanisms and protocols to support end-to-end QoS in a seamless manner;
- To define mechanisms for inter-working between BRAIN and the core network;
- To define requirements for a broadband air interface to support a data rate capacity of about 20 Mbps per cell which can be shared by the users dynamically;
- To evaluate the potential of HIPERLAN Type 2 in order to support the required QoS in an IP-based cellular network and identify the necessary enhancements on the physical layer, the data link control layer, and higher layers;
- To analyse the enhancements by means of link and system simulation;
- To assess the implementation complexity;
- To contribute actively to standardisation bodies and forums including ETSI, IETF and others relevant bodies;
- To disseminate results through major conferences, journals and through the Internet;
- To arrange a BRAIN workshop to promote BRAIN concepts as the core concept of mobile broadband multimedia.

Milestones:
Expected Impact A new service creation platform is expected that brings the concept of Quality of Service up to the application and to the mobile user. For that purpose the access network requirements are specified. In addition current air-interfaces in conjunction with mobile IP technology are evaluated and their inter-working will be defined. The broadband air interface of the BRAIN radio access for IP-based networks as a complement to 2nd/3rd generation systems will be defined, improved and validated. The increasing demand for broadband data services requires the engagement of adaptive transmission techniques and the optimisation of the air interface for IP-based packet traffic. The results of BRAIN will be presented on international conferences, in journals and in a workshop organised by the project. A major part of the dissemination of results will be contributions of BRAIN concepts and results to the international standardisation process. It is expected to influence these standards significantly.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

DAIMLERCHRYSLER AG
Address
Epplestrasse 225
70567 Stuttgart
Germany

Participants (8)

AIRBUS DEUTSCHLAND GMBH
Germany
Address
Kreetslag 10
21129 Hamburg
ALCATEL AUSTRIA AG
Austria
Address
Scheydgasse 41
1211 Wien
DECOMSYS - DEPENDABLE COMPUTER SYSTEMS, HARDWARE UND SOFTWARE ENTWICKLUNG GMBH
Austria
Address
Stumpergasse 48/28
1060 Wien
REGIENOV
France
Address
13 Quai Alphonse Le Gallo
92100 Boulogne Billancourt
SIEMENS AKTIENGESELLSCHAFT
Germany
Address
Wittelsbacherplatz 2
80333 Muenchen
TECHNISCHE UNIVERSITAET WIEN - INSTITUT FUER TECHNISCHE INFORMATIK
Austria
Address
Treitlstrasse 3/3/182
1040 Wien
TTTECH COMPUTERTECHNIK AG
Austria
Address
Schoenbrunnerstrasse 7
1040 Wien
UNIVERSITY OF YORK
United Kingdom
Address
Heslington Hall
YO10 5DD York