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Ultra-thin packaging solutions using thin silicon

Objective

The project aims at the development of different ultra-thin electronic packaging solutions based on thin flexible Si chips with a thickness < 50 µm. Therefore it is necessary to develop wafer thinning, handling and shipping techniques. The material properties of ultra-thin silicon including the electrical performance under bending stress, the long term behaviour and reliability will be investigated. Derived from different industrial applications 3 ultra-thin packaging technologies are planned: multi chipmodule with active component integration into flexible substrates (MCM-L), chip-on-chip and chip-in-paper. The electrical interconnections will be performed mainly by flip-chip technology.

Demonstrators from different applications using these ultra-thin packaging technologies will be assembled and qualified:
- mobile telecommunication device employing MCM-L,
- hearing aid using chip-on-chip,
- identification system (smart label) with chip-in-paper.<50 µm.

Therefore it is necessary to develop wafer thinning, handling and shipping techniques. The material properties of ultra-thin silicon including the electrical performance under bending stress, the long term behaviour and reliability will be investigated. Derived from different industrial applications 3 ultra-thin packaging technologies are planned: multi chipmodule with active component integration into flexible substrates (MCM-L), chip-on-chip and chip-in-paper. The electrical interconnections will be performed mainly by flip-chip technology.

Demonstrators from different applications using these ultra-thin packaging technologies will be assembled and qualified:
- mobile telecommunication device employing MCM-L,
- hearing aid using chip-on-chip,
- identification system (smart label) with chip-in-paper.

Objectives:
The main objective of the project is to provide ultra-thin packaging solutions and flexible electronic assemblies which will on the one side improve existing products e.g. in mobile telecommunication and medical applications and on the other side will enable totally new products with hidden electronics e.g. in paper, foils or cloths.

The detailed objectives are:
- Provide optimised wafer thinning processes for up to 8 inch wafers (d < 50 µm)
- Material properties of ultra-thin silicon including electronic performance under bending stress, long-term behaviour and reliability
- Development of handling, mounting and shipping techniques for ultra-thin wafers
- Small gap, flip chip technology which is reliably working with thin chips
- High density packaging technologies leading to paper-thin assemblies
- Reliable demonstrators employing the ultra-thin packaging technologies
- Industrial optimisation of the silicon thinning and handling technologies as well as the packaging technologies (using the demonstrators).

Work description:
At first the wafer, chip and handling "Specifications" regarding the thin silicon and the specifications of the demonstrators are set up. In the workpackage "Thin silicon" in the first step test wafers for the thinning and handling processes are designed and manufactured. Furthermore thinning processes are developed which are used to provide thin silicon for the ultra-thin packaging solutions. Then handling and mounting techniques for ultra-thin wafers and chips are developed, e.g. based on existing standard equipment a prototype wafer mounter and a prototype die bonder with wafer feeder are developed. This part will be finished with the testing of thin wafers.

In the workpackage "Assembly and interconnection technology" detailed packaging concepts for the three ultra-thin packaging solutions MCM-L, chip-on-chip and chip-in-paper will be worked out. Then test assemblies are realised using the test chips and substrates. In the workpackage "Apply technology to industrial demonstrators" the demonstrators are assembled using the system chips and substrates from the end user companies. The system integration will integrate the new demonstrator in an existing system environment that, at the end, functional systems (e.g. hearing aid, smart label) will be possible. In the next step the electrical, thermal, mechanical and thermo-mechanical "Characterisation" of the demonstrators is performed. Furthermore, the end user companies are performing the system level testing.

Finally the formerly developed thinning and handling techniques are industrialised on the one hand. The "Industrialisation" of the noval packaging technologies for ultra-thin assemblies, on the other hand, is using the three demonstrators. The assembly and packaging processes are transferred to the end user companies where a demonstration series production with statistical analysis and yield estimation is performed. Exploitation and dissemination of results is performed.

Funding Scheme

CSC - Cost-sharing contracts

Coordinator

FRAUNHOFER GESELLSCHAFT ZUR FOERDERUNG DER ANGEWANDTEN FORSCHUNG E.V.
Address
Hansastrasse 27C
80686 Muenchen
Germany

Participants (7)

DATACON SEMICONDUCTOR EQUIPMENT GMBH
Austria
Address
Innstrasse 16
6240 Radfeld/tirol
HELSINKI UNIVERSITY OF TECHNOLOGY
Finland
Address
Otakaari 1
02015 Espoo
NOKIA OYJ
Finland
Address
Keilalahdentie 4
02150 Espoo
OTICON A/S
Denmark
Address
Strandvejen 58
2900 Hellerup
PAV CARD GESELLSCHAFT MIT BESCHRAENKTER HAFTUNG
Germany
Address
Hamburger Strasse 6
22952 Luetjensee
PHILIPS SEMICONDUCTORS GMBH
Germany
Address
Stresemannallee 101
22529 Hamburg
WAFER SERVICES INTERNATIONAL WSI
France
Address
21, Rue Des Cerisiers
91090 Lisses