The VIP project proposes the design of a new Payphone: The Versatile Integrated Payphone. The terminal will be designed following the main principles: to be low power (Fed with the telephone line 48Vdc, 100mW), to support different communication interfaces (POTS, ISDN, GSM), to be low cost (50% cost reduction with respect to actual hardware costs), to provide a powerful processing engine capable of supporting the creation of convergent new services, to investigate and provide a technological framework for the design (Interconnections, architecture, Software/firmware). To achieve the above milestones, a very important integration effort has to be tackled, getting thus to a System On a Chip solution for the electronics part.
1. To conceive and demonstrate the realisation of a Payphone with upgraded services: Internet access, email, banking, voice messaging, etc. These advantages will allow the Telefonica and Siemens Elasa payphones to be ready for the next century, giving the possibility of access modern multimedia and Web services via such a Public device.
2. To design a high performance Integrated Circuit (Micropp PLUS) targeting a multi_IP embedded circuit, optimised for the control of all basic functions of a Payphone, increasing the processing possibilities but at the same time decreasing the overall cost (50% of bill of materials) of the Payphone Hardware.
3. To investigate and solve all the important technological issues involved in hardware and software design for the VIP
%To complete the task of designing and producing an advanced, low cost Payphone, the project will achieve the following goals:
1. Design and develop highly competitive ARM7 IP peripheral blocks, using state of the art tools and state of the art technology.
2. Incorporate a DSP processor (OAK) to implement signal processing functions (filtering, coding, tone generation).
3. Define the overall specifications and architecture of the Payphone equipment based on the requirements and system specifications from Telefonica Telecomunicaciones Publicas (TTP: Telefonica's group company exploiting the Payphone market in Spain).
4.Reduce the system costs on the PCBs by at least 50% with respect to the actual TMPLUS payphone of TTP. This will be done by integrating on chip most of the HW functions needed. This will reduce not only the component cost but also the fabrication processes.
5. Minimise the risks of such a development. This goal will be pursued mainly during design time, investigating implementation alternatives and profiting from the validation and design expertise of the participants.
6. Demonstrate the feasibility and usability of the MicroPP PLUS IC by integrating it in a new Payphone implemented by Siemens Elasa and incorporating new services.
Funding SchemeCSC - Cost-sharing contracts