Objective
PRO3 targets the tight coupling of telecommunication software and hardware for the efficient execution of telecommunication protocols in embedded, programmable hardware architectures. The project will design, develop and fabricate a versatile protocol processor to accelerate execution of telecom and data transport protocols by extending a high performance RISC core with reconfigurable, pipelined programmable hardware. CPU demanding and time consuming low level protocol functions will be handled in the programmable hardware, while higher layer protocol functions will be handled by the on-chip RISC core in an integrated and parallel way. Applications that utilize the PRO3 processor will be developed (e.g. a high performance ATM switch controller and the associated signalling protocol stack and a TCP/IP network interface card for high end servers). The PRO3 processor and the respective system performance will be evaluated in testbed experiments.
Fields of science (EuroSciVoc)
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques.
CORDIS classifies projects with EuroSciVoc, a multilingual taxonomy of fields of science, through a semi-automatic process based on NLP techniques.
- natural sciencescomputer and information sciencessoftware
- engineering and technologyelectrical engineering, electronic engineering, information engineeringelectronic engineeringcomputer hardwarecomputer processors
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Call for proposal
Data not availableFunding Scheme
CSC - Cost-sharing contractsCoordinator
1221 CN HILVERSUM
Netherlands