The project will realize novel low-cost RF front-end subsystems for operation preferably in the license-free 24 GHz ISM band, such as high-speed data links for advanced smart card applications, and RADAR sensors for automotive and traffic control applications. It will combine advanced Silicon-Germanium heterostructure semiconductor devices with advanced passive components using Silicon micro machining and organic dielectrics. The application of micro machining techniques and organic dielectrics will allow to realize on-chip antenna structures and low-loss passive components, while maintaining the cost and manufacturing benefits of standard low-resistance Silicon substrates and established Silicon processing techniques.
Silicon/Silicon-Germanium heterostructure bipolar transistors and Silicon micro machining techniques will be combined to provide a novel monolithic integration technique capable of providing low-cost solutions for wireless communications and sensing applications in the upper microwave frequency range. Specifically, the technology aims at realizing short-range wireless data communications and RADAR sensor subsystems operating in the license-free 24 GHz ISM band. Micro machining techniques are being used to reduce microwave losses in low- to medium-resistivity Silicon substrates, and to realize on-chip antenna elements. Micro machining and passive structures using thick organic dielectrics will be used preferably as a backend process to Si/SiGe IC fabrication; their development will be guided by mass-production compatibility. Novel packaging solutions will be researched as an integral art of providing low-cost RF front-end solutions.
An emerging commercial Si/SiGe HBT process with cut-off frequencies up to 80 GHz will serve as the foundation of the technology development. To achieve significant improvements in the performance of passive on-chip components, transmission lines, and on-chip antenna structures, bulk and surface micro machining techniques will be employed to obtain inorganic and organic dielectric membrane structures. Additionally, thick organic dielectric structures will be used on bulk Silicon. Through microwave characterization methods, a CAD model library of the Si/SiGe active devices, the advanced passive devices as well as the antenna structures will be established and used for the design of the demonstrators. Two demonstrator subsystems will be realized using the technological processes developed in the project: a smart card including a high-speed including a high-speed data communications link operating at 24 GHz, and a RADAR sensor operating in the same frequency range. A separate work package will investigate novel methods of packaging the RF front-end ICs. The question whether the chip can be over moulded of if a cap-on-chip approach has to be used will be investigated, as well as LTCC cavity techniques. Interconnect methods can use flip chip or wire bonding techniques. Integration of the antenna element on-chip may eliminate the need for extremely high-speed interconnect structures, further simplifying the application of the front-end. The exploitation of the technology by European industry will be prepared by early contacts to end users who will be consulted in the drafting of the demonstrator requirements document, and through on-going dissemination of results exemplifying the application potential of the new technology.
1. Development of a Si micro machining process completely compatible with Si/SiGe IC mass production, allowing improved passive circuit elements, transmission lines, and on-chip antenna structures;
2. Availability of a complete CAD designs kit for the process, including the SiGe active devices, for applications in the 24 GHz range and beyond;
3. Availability of a low-cost packaging technique for the RF front-end ICs including on-chip antenna elements;
4. Two demonstrators.
Funding SchemeCSC - Cost-sharing contracts
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