The objective of ASMED is to apply new ASIC design concepts to the development of a new generation of ASIC's for advanced medical devices. The key innovation is to achieve a standard ASIC which may be used for a range of bio-data signals, thereby replacing the discrete, single application dedicated and often hand selected components used in current bio-data measurement equipment, e.g. ECG (Electrocardiography), EEG (Electroencephalography) and EP's (Evoked Potentials).
The ASIC will enable devices to be developed which are more compact, more reliable, more comfortable for the patient and able to be worn by the users or medical diagnostics data acquisition purposes in normal ambient conditions. It will also enable significantly lower production costs to be attained.
The key objective of this project is to specify and develop an ASIC Which will enable power consumption to be reduced by a factor 5-10 (to max. 10mW per channel) and thereby permit ambient devices to be developed foe at least 12 hours mobility, and to improve the signal to noise ratio by a factor 2 compared with current systems. These design goals will be achieved using the specific experience of the research performer in ASIC chip design using a predictive coding methodology specially optimised for medical applications.
WP0 Project Management
Consists of the technical and administrative management of the project including organisation of the mid and final review and preparation of the exploitation of results.
Task 1.1. Requirements study ANS & Polysomnography;
Task 1.2. Requirements study Neurology;
Task 1.3. Requirements study Cardiology:
- Identification of user needs;
- Interviews with user;
- Definition of target applications;
- Definition of medical instrument functions;
Task 1.4. Preliminary Specification:
- Assimilation of technical requirements of each SME partners;
- Integrate partner contributions to full requirements specification.
WP2 - Technical Concept Study (Low noise amplifier, predictive A/D-Converter)
In WP2 critical innovative concepts for integrated circuits are verified, by high level simulations.
WP3 - ASIC Architecture Design (architecture development, data coding, data interfaces, target specification)
In WP3 the architecture of the ASIC is developed. Including all parts, and defining internal data flow.
WP4 - ASIC Design (First design, documentation, test of first silicon, first redesign, test of engineering samples, second redesign, test of prototype samples)
In WP4 the ASIC Final is designed in three steps, first design, first redesign, and second redesign.
WP5 - Technology Implementation (user feedback cardiology, user feedback neurology, user feedback ANS & polysomnography, pre-clinical trials, training actions, documentation, application software adaptation)
In WP5 the new ASIC technology is implementation in the different markets.
WP1 - Requirements Specifications;
WP2 - Technical Concept Study;
WP3 - ASIC Architecture:
M1 - Prediction verified;
M2 - Architecture ready;
WP4 - ASIC Design:
M3 - Tape Out;
M4 - Documentation ready;
M5 - First Silicon;
M6 - Engineering Samples;
M7 - Prototype Samples;
WP5 - Technology Implementation:
M8 - Project End.
Funding SchemeCRS - Cooperative research contracts