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HDTV-Switching

Objective

- VLSI switch component 16 x 16 carrying 8 x 155 Mbit/s = 1.244 Gbit/s (TDM) per inlet and outlet.
- Demonstration as a generic component (multiplexer, demultiplexer, selector, switch) in IBC.
The bit rates of high definition television (HDTV) signals may vary between 155 Mbits{-1} and 1,244 Gbits{-1}, corresponding to cost effective HDTV codecs amid different application areas (studio, contribution, distribution). Switching and transmission of 1 Gbits{-1} signals within an extended switching network raises many problems, which have yet to be solved in an economic way. It is these problems that are being addresses within this project, by applying the most advanced very large scale integration (VLSI) and packaging technologies. The preferred switching technique for distributive services (television (TV) or HDTV) is circuit switching applied in a synchronous time division (STD) switching network and component. The switching component itself will also be used in cross connect systems digital cross connected system (DCS), in the customer premises network (CPN) area, or as a multiplexer/demultiplexer.
The ongoing design of key components have reached some intermediate results. A test chip containing the most critical parts of the switch component (input and output buffers, front end of the bit synchroniser) has been built.
A potential single chip solution for achieving 19.9 Gbits{-1} output from a 38.8 Gbits{-1} input, following complex processing of data within the core of the chip (eg synchronous digital hierarchy (SDH) processing, switching) has been obtained.
Logical and topographic layout of the final chips (500 000 transistors, 185 mm{-2} has been designed.
Technical Approach:

The bit-rates of HDTV signals may vary between 155 Mbit/s and 1.244 Gbit/s, corresponding to cost-effective HDTV codecs and different application areas (studio, contribution, distribution). Switching and transmission of 1 Gbit/s signals within an extended switching network raises many problems, which have yet to be solved in an economic way.

It is these problems that are being addressed within this project, by applying the most advanced VLSI and packaging technologies. The preferred switching technique for distributive services (TV or HDTV) is circuit switching applied in a STD switching network and component. The switching component intended to be realised is a matrix with 16 (+16) input lines and 16 output lines offering zero blocking and full broadcast capabilities. Each line is composed of 8 x 155 Mbit/s (STM-1 according to CCITT Rec. G.707) signals. The switching component itself will also be used in cross connect systems (DCS), in the CPN area, or as a multiplexer/demultiplexer.

Project results are made available to RACE projects: R1081: BUNI Demonstrator; R1022: Technology for ATD; and R1051: Multi-Gigabit Transmission in the IBC Subscriber Loop.

Key Issues

- Modular and easily extendible switching systems for 155 to 1244 Mbit/s.
- Supportable by both STM and ATM oriented systems.
- Based on CCITT recommendations G.707 G.708 G.709 and I.432 (SDH oriented physical media dependent layer).
- Low cost in mass production to enable and speed up HDTV market penetration.

Achievements

Two major reports have been issued on the following topics:
- specification of equipment practice (including a demonstrator for the electrical performance)
- detailed circuit specification for the switch component based on the evaluation of different alternatives for the switching component architecture.

The on-going design of key components have reached some intermediate results:
- A test chip containing the most critical parts of the switch component (input and output buffers, front end of the bit synchroniser).
- A potential single chip solution for achieving 19.9 Gbit/s output from a 38.8 Gbit/s input, following complex processing of data within the core of the chip (eg SDH processing, switching...).
- Logical and topographic layout of the final chips (500 000 transistors, 185 mm2)

Expected Impact

By the availability of a monolithically integrated component for HDTV switching, the cost of providing HDTV programs to users is significantly reduced, making IBC attractive. These devices may be used in local exchanges, remote units, digital cross-connect systems (DCS), and in the CPN area.

The switch component is one of the first VLSI chips entering the GHz speed range with high-complexity devices. Logical and topographic design of the component will lead to experience and basic knowledge having an impact on future Gbit/s circuits. Also testing of the components and demonstrator construction requires new approaches.

Coordinator

Alcatel SEL AG
Address
Holderäcker Straße 35
70499 Stuttgart
Germany

Participants (2)

Alcatel Standard Electrica SA
Spain
TECHNICAL UNIVERSITY OF DENMARK
Denmark