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ExaNoDe builds groundbreaking 3D compute unit prototype for exascale

The European ExaNoDe project has built a groundbreaking compute unit prototype paving the way to tomorrow's exascale supercomputers, those capable of performing a billion billion calculations per second, or ten times faster than today's most powerful computers.

Fundamental Research

The European ExaNoDe project has built a groundbreaking compute unit prototype paving the way to tomorrow's exascale supercomputers, those capable of performing a billion billion calculations per second, or ten times faster than today's most powerful computers. The ExaNoDe prototype allows different types of processor to be combined and interconnected together onto the same chip, from the low-power central processing units (CPUs) to reprogrammable companion processors which can be reconfigured on the fly. By allowing on chip interconnections, the prototype helps overcome one of the main roadblocks to more powerful computers: the energy and performance cost of transferring data between the main processors and their companion processors. All of this in a revolutionary three-dimensional package. "Power consumption and affordability are the main hurdles in the way of a compute unit capable of delivering exascale performance," says Denis Dutoit, research engineer at CEA-Leti and the coordinator of ExaNoDe. "The combination of 3D integration and heterogeneous units on the chip addresses these hurdles. Were one to use standard technologies, as used in the top-end PCs used by gamers, then reaching exascale would require a computer with power requirements equivalent to a city with a million inhabitants." Taking as a basis an innovative interposer developed by CEA, ExaNoDe allows the combination of multiple system-on-chips (SoC) chiplets, forming a three-dimensional integrated circuit (3DIC). This delivers multiple advantages, such as: • higher chip fabrication yields – thus lower costs – thanks to the smaller chip size • reduced costs of customization, as the modular design allows combination of the most cutting-edge technology with lower-cost, more established technology as required • the flexibility to slot in compute elements – such as CPUs and accelerators – on a single chip for different applications, resulting in greater performance for a wider range of applications at lower design costs • reduced inter-chip communication distances, resulting in improved energy efficiency "The ExaNoDe prototype integrates multiple core technologies: a 3D active interposer with chiplets, Arm cores with FPGA acceleration, a global address space, high-performance and productive programming environment, which will enable European technology to satisfy the requirements of exascale computing," adds Denis. ExaNoDe builds on previous European-funded research by using the UNIMEM memory system, which was created in the EUROSERVER project and is being brought to scale in the EuroEXA project. This allows the creation of shared memory among multiple compute nodes and therefore helps reduce the distance the data has to travel. To allow programmers to fully exploit these different hardware resources, advances have been made in the OmpSs-2@Cluster and OpenStream programming models for parallel computing. Real-life applications, in fields such as materials science and machine learning, have been developed and tested on the ExaNoDe architecture using these programming models and communication application programming interfaces (APIs). About ExaNoDe Thirteen partners from six European countries were involved in the ExaNoDe project: CEA (France), Arm (UK), the University of Manchester (UK), ETH Zürich (Switzerland), CNRS (France), Kalray (France), FORTH (Greece), Virtual Open Systems (France), Fraunhofer ITWM (Germany), Barcelona Supercomputing Center (Spain), Forschungszentrum Jülich (Germany), Atos (France) and scapos (Germany). CEA, Arm, ETH Zürich and Kalray deployed their knowledge of silicon-level power-management techniques, chiplet and nanotechnology design. CNRS supported CEA in the assembly and packaging of devices. FORTH contributed its expertise in device-to-PCB integration and in the implementation of the UNIMEM memory scheme, firmware and operating systems. Virtual Open Systems provided the virtualized checkpointing and UNIMEM virtualization.

Keywords

HPC, software