“Chip-to-chip communication in server board and intra-rack designs currently forms the hotspot of the high-end server industry towards reducing physical space, network complexity and resources – switches and cables – while enabling higher performance per watt,” says Nikos Pleros, coordinator of the EU-funded ICT-STREAMS project. “The new server board roadmap explores solutions that can bring more and more processors onto multi-socket boards (MSBs) to increase performance at a reduced cost and energy envelope, allowing at the same time reductions in physical space requirements and increases in throughput densities.”
Holistic mid-board transceiver and router device portfolio
Project partners delivered a complete on-board optical chip-to-chip direct-interconnection system for MSBs that offers 25.6 Tb/s aggregate bidirectional throughput between the processor sockets. To achieve this, they relied on interfacing the processor sockets with high-frequency silicon (Si) photonic transceivers that communicate by exploiting the wavelength routing capabilities of a Si photonic arrayed waveguide grating router-based all-passive routing platform. The Si photonic routing and transceiver chips of the MSB configuration can communicate via a high-frequency electro-optical printed circuit board (EOPCB) that acts as the low-loss optical interconnection platform and supports both radio frequency (RF) and direct current (DC) connectivity for the transceiver actives.
Boosting server board density and throughput
“ICT-STREAMS is expected to resolve current bandwidth and switch-latency barriers in multi-socket chip-to-chip configurations, allowing for 25 Tb/s aggregate throughput, contention-free, on-the-fly massive data movements for multi-socket any-to-any interconnection, supporting in this way novel rack-scale architectures for compute, memory and storage resource disaggregation concepts,” explains Pleros. Its optical engines extend the performance boundaries of transceiver technology, by means of a number of wavelength division multiplexing (WDM) channels (16 x) and channel data rate (50 Gb/s) towards a 0.8 Tb/s throughput optical engine. Its single-mode polymer EOPCB employing an adiabatic optical coupling concept with high-density, high-frequency RF and optical input/output interfaces enables single-step chip-to-board assembly, reducing manufacturing time and cost requirements. “The innovative thermal drift compensation system is expected to make a significant impact on the real-life applicability of Si photonics technology by monitoring and controlling the WDM Si photonics components in a non-invasive way,” elaborates Theoni Alexoudi, technical leader of ICT-STREAMS. “Recent results that will be presented at the Optical Networking and Communication Conference in San Diego in March reveal the error-free chip-to-chip interconnection over a temperature fluctuating environment.” “ICT-STREAMS technology exploits WDM silicon photonics to substantially improve the state-of-the-art server board density and throughput,” concludes Miltos Moralis-Pegios, senior project researcher. “At the same time, it pushes the performance envelope of optical interconnects by offering significant advances in the fields of optical engines, embedded optics and assembly, thermal drift compensation, III-V on Si laser integration, in-line amplification and HPC/DC architectural design,” adds Stelios Pitris, who is also a senior researcher.
ICT-STREAMS, routing, throughput, transceiver, server board, processor, chip-to-chip, WDM, MSB, Si photonics