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Content archived on 2024-06-18

Modelling of the reliability and degradation of next generation nanoelectronic devices

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Moving beyond silicon

For electronics based on new materials, there is very little understanding of the factors that define reliability and degradation. EU-funded scientists integrated a multi-scale modelling scheme with state-of-the-art experimental tools to assist designers in optimising these next-generation nanoelectronic devices.

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Despite its ubiquity as a transistor building material, silicon is facing competition from new semiconductor materials. The downscaling of complementary metal-oxide-semiconductor (CMOS) technology approaches its fundamental limits. At the same time, transistor manufacturers are in an arms race to make electronic devices lighter, smaller and more efficient. However, the replacement of silicon and its native oxide is hindered by lack of confidence in the reliability of nanoelectronic devices based on inorganic crystalline materials. Scientists initiated the EU-funded project MORDRED (Modelling of the reliability and degradation of next generation nanoelectronic devices) with the ultimate objective of helping designers and engineers to derive accurate lifetime projections. With shrinking transistor dimensions down to nanometre size, the nanoelectronic device behaviour starts to be dominated by the granularity of materials and quantum mechanical effects. In order to preserve their accuracy and reliability, MORDRED scientists integrated physics-based 3D simulations with detailed experimental measurements of material properties at the quantum mechanical level. The aim was to gain a firm understanding of the mechanisms leading to CMOS transistor degradation and their impact on integrated circuits' performance. Research work resulted in a reliability simulation framework from atomistic up to circuit simulations. Trapping and de-trapping dynamics were reproduced by a Monte Carlo engine that enables oxide degradation simulations. MORDRED methodologies proved accurate and efficient for modelling force fields at semiconductor-oxide and metal-oxide interfaces. They also included mathematical models of non-radiative multi-phonon processes, instabilities and carrier injections affecting the development of certain defects in semiconductor devices. In particular, the so-called bias temperature instability and random telegraph noise in CMOS technology arise from charging of defects (traps). The properties of such traps, both electrical and physical, were measured under specific conditions allowing MORDRED scientists to group them and compare them to simulations and thus improve models. A better understanding of oxide trap behaviour is crucial for reliability issues, such as hot carrier degradation and time-dependent dielectric breakdown. Substantial new insights were gained through the comprehensive experimental measurements gathered in a reference database, enabling to correlate measured signals with sources of degradation. New semiconductor materials have already started being used to improve the performance of CMOS technology while reducing power consumption. MORDRED results will help ensure that the next generation of nanoelectronic devices maintains their enhanced performance over longer operational lifetimes.

Keywords

Silicon, reliability and degradation, nanoelectronic devices, transistor, CMOS

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