Summer school on standards in design automation of electronic systems
8 July 1996 - 8 July 1996
Czechia
The European Commission is sponsoring a summer school on "Standards in design automation of electronic systems" to take place in Prague, Czech Republic, on 8-13 July 1996.
The event is being organized within the framework of the BENEFIT project, which is part of the COPERNICUS programme, and in cooperation with the European CAD Standardization Initiative (ECSI). It will also build upon the results of the ESIP project within the ESPRIT programme. The BENEFIT project is aimed at stimulating East-West European cooperation between universities and industry.
Standards play an important role as a means of transferring new technologies to manufacturing. They promote the re-use of designs of existing electronic systems and components, thus ensuring an increase in productivity. Standards are also a universal platform facilitating collaboration among industrial partners, and between research groups and industry.
The summer school will cover state-of-the-art standards in electronic design automation (EDA). Courses will present main EDA industry-accepted design and modelling languages, electronic data and documentation interchange formats, and main standards in testing. The school will also cover emerging standards, like the Open Model Forum, and accompanying standards, like synthesis packaging for VHDL.
The school is organized primarily for engineers, researchers, and decision makers as an intensive course including exercises and "hands-on" demonstrations of relevant software.
The preliminary programme for the school is as follows:
- EDA standards: overview and roadmap;
- European policy and EDA standards;
- VHDL93;
- VERILOG;
- Standards in analogue and digital modelling and simulation;
- VITAL, the VHDL-based methodology for building libraries of ASIC models;
- The Open Model Forum and IBIS;
- VHDL synthesis and the IEEE 1076.3 standard;
- EDIF and PCB standards;
- Information modelling applied to EDA standards;
- An overview of standards in testing of electronic systems;
- The electronic data book.
Candidates should apply for admittance to the school, explaining motivation and background, by sending an application to:
ECSI Equation
2 avenue de Vignate
F-38610 Gieres
Fax +33-76428787
E-mail: Adam.Pawlak@imag.fr or E-mail: ecsi@grenet.fr
For further information about the school, please contact:
Organizing Chairman
Mr. Michal Servit
Czech Technical University
Dept. of Computers
Karlovo nam. 13
CZ-121 35 Prague 2
Tel. +42-2-24357473; Fax +42-2-298098
E-mail: servit@cs.felk.cvut.cz
Further details may also be found on the World Wide Web at:
http://www.kp.dlr.de/IT-NCP/index.htm(opens in new window)
The event is being organized within the framework of the BENEFIT project, which is part of the COPERNICUS programme, and in cooperation with the European CAD Standardization Initiative (ECSI). It will also build upon the results of the ESIP project within the ESPRIT programme. The BENEFIT project is aimed at stimulating East-West European cooperation between universities and industry.
Standards play an important role as a means of transferring new technologies to manufacturing. They promote the re-use of designs of existing electronic systems and components, thus ensuring an increase in productivity. Standards are also a universal platform facilitating collaboration among industrial partners, and between research groups and industry.
The summer school will cover state-of-the-art standards in electronic design automation (EDA). Courses will present main EDA industry-accepted design and modelling languages, electronic data and documentation interchange formats, and main standards in testing. The school will also cover emerging standards, like the Open Model Forum, and accompanying standards, like synthesis packaging for VHDL.
The school is organized primarily for engineers, researchers, and decision makers as an intensive course including exercises and "hands-on" demonstrations of relevant software.
The preliminary programme for the school is as follows:
- EDA standards: overview and roadmap;
- European policy and EDA standards;
- VHDL93;
- VERILOG;
- Standards in analogue and digital modelling and simulation;
- VITAL, the VHDL-based methodology for building libraries of ASIC models;
- The Open Model Forum and IBIS;
- VHDL synthesis and the IEEE 1076.3 standard;
- EDIF and PCB standards;
- Information modelling applied to EDA standards;
- An overview of standards in testing of electronic systems;
- The electronic data book.
Candidates should apply for admittance to the school, explaining motivation and background, by sending an application to:
ECSI Equation
2 avenue de Vignate
F-38610 Gieres
Fax +33-76428787
E-mail: Adam.Pawlak@imag.fr or E-mail: ecsi@grenet.fr
For further information about the school, please contact:
Organizing Chairman
Mr. Michal Servit
Czech Technical University
Dept. of Computers
Karlovo nam. 13
CZ-121 35 Prague 2
Tel. +42-2-24357473; Fax +42-2-298098
E-mail: servit@cs.felk.cvut.cz
Further details may also be found on the World Wide Web at:
http://www.kp.dlr.de/IT-NCP/index.htm(opens in new window)