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Content archived on 2024-05-29

RSFQ control of Josephson Junction Qubits

Objective

The steady progress in the development of superconducting qubits is opening the door towards the implementation of a complex quantum information processor. There is no doubt that single superconducting qubits and even systems with two qubits can provide decoherence times long enough to perform basic quantum algorithms. However, further increase of system complexity is facing the problem of inefficient external room-temperature electronics test beds. Due to heavy heat load, poor noise properties and complicated packaging, current test beds are already insufficient for systems with as few as three qubits.

The goal of RSFQubit is to develop a system-on-chip solution for a quantum information processor by integrating qubits with superconducting digital electronics, known as Rapid Single Flux Quantum logic. The advantage of such a solution is that an RSFQ classical test bench can operate at the same temperature as qubits, it is compatible with the qubit fabrication process, it is sensitive to signals at a very low energy level and it is fast enough to perform the required digital processing during the short decoherence time.

The concept of the RSFQubit can be interpreted as a combination of two shells: an inner quantum shell comprising the whole diversity of the existing superconducting qubits and an outer classical RSFQ shell. Even though the actual design of the classical-to-quantum interface can be different for different qubits, RSFQubit targets to a similar general architecture for the RSFQ digital shell, which would consist of excitation circuitry, qubit read out, data storage and digital signal processing unit. The major scientific and engineering challenge of the project is to reach the overall system performance suitable for running simple quantum algorithms. It comprises analysis of noise properties of the RSFQ circuitry, design of interfaces to minimize back action, development of a suitable fabrication process and, finally, development of efficient algorithms.

Call for proposal

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Coordinator

CHALMERS TEKNISKA HOEGSKOLA AKTIEBOLAG
EU contribution
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Address

412 96 GOETEBORG
Sweden

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Total cost
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Participants (8)