Descripción del proyecto
Nanoelectronics
Single chip to boost battery life and reduce costs
A whole new generation of devices powered by integrated circuits, popularly known as chips, will be more affordable, more flexible and less-power hungry than their present-day equivalents.
For the consumer, the development will specifically lead to a longer battery life on mobile devices, lower prices for a lot of different devices for the home, car and general communications, and the ability to cram more applications onto a single device.
In large part, the advances will be due to the ongoing efforts of European researchers in project NANO-RF, which commenced in January 2006 and comes to an end in December 2008.
The project team has been focusing on CMOS technology to achieve some significant breakthroughs. CMOS, or complementary metal-oxide semiconductor, is today the major class of integrated circuits. CMOS refers both to a particular style of digital circuitry design and the processes used to implement that circuitry on silicon chips.
Smaller and stronger
The advent and development of CMOS technology has been responsible for the considerable improvement in digital technologies over the past few years, and specifically anything to do with computing power and control logic.
Processors have steadily become both smaller and more powerful as new more efficient materials and designs are developed for their manufacture. But these advances have had no effect on the special analogue chips used for radio communications connections in devices, such as mobile phones and portable computers, which have their own separate circuits.
The project NANO-RF team set out to relocate, or port, the radio frequency (RF) functions onto the same chip as the digital CMOS circuitry, thus replacing several chips with a single multi-purpose one.
More efficient chips
This achievement would not only make for a more efficient overall chip, but also improve the RF functions because of the immunity to noise and the lower power consumption of CMOS devices.
Using expertise from the industrial and academic partners involved in the project, the researchers went through two learning cycles, during which circuits for a single-chip solution were modelled, produced and tested.
They did the testing at different frequencies on the radio spectrum and for different applications. These included voice and data communication on 3G and 4G mobile networks, in-house wireless connectivity via ultra wideband (UWB), and in-vehicle applications such as avoidance signals.
What they all have in common is the combination of a radio signal and processing power.
Choice of technologies
In practical terms, the research could result in a single chip on your mobile phone for voice, data and internet connections, as well as processing and storage power. Or the chip could power a device in your home, allowing you to record wirelessly a high-definition television programme, or wirelessly transfer it between recorder, computer and mobile device, thus making the spaghetti junction a thing of the past.
The researchers aim to have developed two prototype chips using different materials and architectures by the time the project ends in December 2008. The prototypes will give chip-makers a choice of guidelines and technologies for single-chip development.
CMOS scaling is the engine of the continuous improvement of digital applications. It has also been demonstrated that CMOS also offers great potential for very high speed or very low power wireless and wireline applications. This potential, together with the high levels of integration that are typical for CMOS technology, and the cost per square mm, allows RF CMOS to compete with SiGe(C) bipolar and BiCMOS and III-V (GaAs, InP) as the technology of choice for new communication demands in volume production. Therefore, it can become a main contributor to the ubiquitous communication society. However, at the same time, limitations start to appear, especially with respect to Vdd scaling, and loss of analog performance with the introduction of new materials. The 45nm node (and beyond) is not well established for digital CMOS, which makes it more difficult to assess the analog/RF performance on the level of basic building blocks. Therefore, the first objective of this project is an early assessment of the potentials of the 45nm Analog/RF CMOS options. This objective is essential for establishing a long-term Analog/RF technology development strategy. The second objective is to develop circuit topologies that cope with the low Vdd operation and possible degradations of analog/RF performance, very high frequencies or ultra low power consumption. The third objective is to deliver compact models for 45nm Analog/RF CMOS. There is a natural flow of information from technology, to models and to circuit design. Therefore, NANO-RF anticipates the need for several optimisation cycles, including the design of two test vehicles within the course of the project. This approach allows for feedback to technology and modelling based on initial circuit results.
Ámbito científico (EuroSciVoc)
CORDIS clasifica los proyectos con EuroSciVoc, una taxonomía plurilingüe de ámbitos científicos, mediante un proceso semiautomático basado en técnicas de procesamiento del lenguaje natural. Véas: El vocabulario científico europeo..
CORDIS clasifica los proyectos con EuroSciVoc, una taxonomía plurilingüe de ámbitos científicos, mediante un proceso semiautomático basado en técnicas de procesamiento del lenguaje natural. Véas: El vocabulario científico europeo..
- ciencias naturales matemáticas matemáticas puras topología
- ingeniería y tecnología ingeniería eléctrica, ingeniería electrónica, ingeniería de la información ingeniería de la información telecomunicación radiotecnología
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Las convocatorias de propuestas se dividen en temas. Un tema define una materia o área específica para la que los solicitantes pueden presentar propuestas. La descripción de un tema comprende su alcance específico y la repercusión prevista del proyecto financiado.
Convocatoria de propuestas
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Procedimiento para invitar a los solicitantes a presentar propuestas de proyectos con el objetivo de obtener financiación de la UE.
FP6-2004-IST-4
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Régimen de financiación (o «Tipo de acción») dentro de un programa con características comunes. Especifica: el alcance de lo que se financia; el porcentaje de reembolso; los criterios específicos de evaluación para optar a la financiación; y el uso de formas simplificadas de costes como los importes a tanto alzado.
Coordinador
3001 Leuven
Bélgica
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