Periodic Reporting for period 2 - AMBEATion (Analog/Mixed Signal Back End Design Automation based on Machine Learning and Artificial Intelligence Techniques)
Reporting period: 2023-09-01 to 2025-08-31
The AMBEATion project aims to highly increase designers’ productivity in Analog Mixed Signal (AMS) industrial designs, primarily AMS Backend, addressing the needs of industrial users. This is achieved through the application of Machine Learning (ML) and Artificial Intelligence (AI) techniques, which are used to develop methodology and scriptware around state-of-the-art Electronic Design Automation (EDA) tools, automating key steps of the backend flow and supporting human designers. Within this technical scope, the project also aims to foster the exchange of AI/ML, semiconductor design, and EDA competences between industrial and academic partners, and to set the basis for a long-lasting technical partnership that will be beneficial for European industry competitiveness.
Research and Innovation Activities
The main result of the project is a fully functional AMS Back-End (BE) scriptware flow (focusing in particular on the placement phase) which has been extensively improved and tested in the final two years of the project. The flow can take as input a Netlist in CDL format, plus additional technology and configuration files, and produce as output a layout in GDS-II format, in which all devices in the netlist have been legally placed. The flow is implemented through a modular and flexible software tool, which achieves the placement by chaining the execution of multiple scripts (or modules). The entire flow has been validated on several analog and digital netlists, as well as on circuits extracted from a reference pilot project proposed by STCZ. The modular organization of the flow also favors extensibility, simplifying the creation of new components, or the introduction of multiple alternative scripts for the same step, thus easing comparison between classic and AI/ML-based approaches. More precisely, the tool includes functionalities for:
- CDL input conversion
- Analog Topology Recognition
- Analog Device Placement
- Analog Group Placement
- Digital Placeability Estimation
- Generation of GDS-II outputs
- Export module for compatibility with Synopsys’ industrial tools (Custom Compiler)
- Generation of HTML and SVG visualizations of the layout.
- Several utilities scripts
- A top-level GUI and CLI
Training and transfer of knowledge activities have been carried out for the entire duration of the project, providing all the researchers the necessary know how to undertake the planned work and research.
Main Results, Exploitation and Dissemination.
Throughout the project, three versions of the AMBEATion AMS BE flow have been released (pre-alpha, alpha and beta).
Some modules of the latest release are already actively tested (experimentally) in the context of chip design activities of project staff members at their respective organization, in particular the planned “end users” of ST Microelectronics. More specifically, staff from ST-I is applying the digital placeability estimation module for quick turnaround tests on the feasibility of a given design. Similarly, STCZ staff is experimenting with using the AMBEATion flow analog placement results as starting point, on top of which the final placement can be obtained by means of manual refinement.
Future exploitation activities will be aimed at including (parts of) the AMBEATion developments in actual production flows, moving from experimental tests to practical adoption.
In addition to these technical achievements, the project has also produced multiple dissemination outputs, including:
• Five scientific publications in international conference proceedings.
• One poster at the international event “EDA Workshop 2023”
• The organization of a workshop with more than 100 registered participants, including talks by project team members as well as external invited speakers.
• The setup of a project website and LinkedIn profile.
Moreover, one additional paper in currently under revision for publication in an international scientific journal.
The main result of the project is a fully functional AMS Back-End (BE) scriptware flow (focusing in particular on the placement phase) which has been extensively improved and tested in the final two years of the project. The flow can take as input a Netlist in CDL format, plus additional technology and configuration files, and produce as output a layout in GDS-II format, in which all devices in the netlist have been legally placed. The flow is implemented through a modular and flexible software tool, which achieves the placement by chaining the execution of multiple scripts (or modules). The entire flow has been validated on several analog and digital netlists, as well as on circuits extracted from a reference pilot project proposed by STCZ. The modular organization of the flow also favors extensibility, simplifying the creation of new components, or the introduction of multiple alternative scripts for the same step, thus easing comparison between classic and AI/ML-based approaches. More precisely, the tool includes functionalities for:
- CDL input conversion
- Analog Topology Recognition
- Analog Device Placement
- Analog Group Placement
- Digital Placeability Estimation
- Generation of GDS-II outputs
- Export module for compatibility with Synopsys’ industrial tools (Custom Compiler)
- Generation of HTML and SVG visualizations of the layout.
- Several utilities scripts
- A top-level GUI and CLI
Training and transfer of knowledge activities have been carried out for the entire duration of the project, providing all the researchers the necessary know how to undertake the planned work and research.
Main Results, Exploitation and Dissemination.
Throughout the project, three versions of the AMBEATion AMS BE flow have been released (pre-alpha, alpha and beta).
Some modules of the latest release are already actively tested (experimentally) in the context of chip design activities of project staff members at their respective organization, in particular the planned “end users” of ST Microelectronics. More specifically, staff from ST-I is applying the digital placeability estimation module for quick turnaround tests on the feasibility of a given design. Similarly, STCZ staff is experimenting with using the AMBEATion flow analog placement results as starting point, on top of which the final placement can be obtained by means of manual refinement.
Future exploitation activities will be aimed at including (parts of) the AMBEATion developments in actual production flows, moving from experimental tests to practical adoption.
In addition to these technical achievements, the project has also produced multiple dissemination outputs, including:
• Five scientific publications in international conference proceedings.
• One poster at the international event “EDA Workshop 2023”
• The organization of a workshop with more than 100 registered participants, including talks by project team members as well as external invited speakers.
• The setup of a project website and LinkedIn profile.
Moreover, one additional paper in currently under revision for publication in an international scientific journal.
The AMBEATion AMS BE flow produces valid layouts, meaning that: i) all devices in the input netlist are placed somewhere; ii) the placement does not contain overlaps; iii) the distance between devices respects technological constraint, etc. Moreover, the Quality-of-Results (QoR) of the produced layouts in terms area occupation, utilization, and routability (measured for example by the cumulative Half-Perimeter Wire Length - HPWL) is comparable to the one of human layouts on simple circuits (with few tens of devices).
Layouts generated by expert human designers are still of superior general QoR, for example because they also consider extra constraints (e.g. signal integrity, electrical matching, etc) which the AMBEATion flow does not yet fully account for in its automatic optimization. However, it is important to remark that unsupported constraints in AMBEATion are not due to a technical limitation of the flow algorithms, but mostly for time reasons.
That said, the AMBEATion flow is now mature enough to provide designers with a “reasonable starting point”, automatically an in a very short time, on top of which they can apply manual refinements. This is possible also thanks to the export functionalities of the flow, which enable using the AMBEATion results within Synopsys Custom Compiler, thus also permitting the execution of the remaining physical design phases (routing, signoff). In summary, the flow fully achieves its original goal of providing a quick method for design space exploration and rapid production of multiple “good enough” valid solutions without manual intervention, which experienced designers can then refine with their expertise to achieve a higher QoR, rather than wasting their effort in initial and time-consuming design iterations.
On the other hand, the current AMBEATion results are more directly comparable with those generated by other similar state-of-the-art AMS auto-placer tools developed by collaborative research projects (ALIGN, MAGICAL, etc). In this regard, our flow’s latest release includes all fundamental components that are present also in those tools. Additionally, AMBEATion takes into account more realistic sets of constraints (e.g. considering the impact of bulk connections in topology recognition, and allowing for pocket sharing among devices during placement, or including specific flow steps to handle the full-digital blocks in a complex AMS design). Moreover, the AMBEATion flow is tested on a real-world industrial technology node from ST and on several netlist from a real industrial project, rather than on simple netlists and open-source PDKs. For this exact reason (different benchmark circuits and technology libraries) a direct quantitative comparison with existing auto-placers is not possible, but in terms of supported features, we believe that AMBEATion is currently beyond the academic state-of-the-art.
Lastly, AMBEAtion’s modular software organization simplifies extensibility and quick replacement and/or comparison of algorithms for each individual flow step (both classic and AI/ML based). As we believe that this is a significant advantage of our flow with respect to the state of the art, the consortium is currently considering the option of open-sourcing the AMBEATion flow (after removing all IP-sensitive technological information).
Layouts generated by expert human designers are still of superior general QoR, for example because they also consider extra constraints (e.g. signal integrity, electrical matching, etc) which the AMBEATion flow does not yet fully account for in its automatic optimization. However, it is important to remark that unsupported constraints in AMBEATion are not due to a technical limitation of the flow algorithms, but mostly for time reasons.
That said, the AMBEATion flow is now mature enough to provide designers with a “reasonable starting point”, automatically an in a very short time, on top of which they can apply manual refinements. This is possible also thanks to the export functionalities of the flow, which enable using the AMBEATion results within Synopsys Custom Compiler, thus also permitting the execution of the remaining physical design phases (routing, signoff). In summary, the flow fully achieves its original goal of providing a quick method for design space exploration and rapid production of multiple “good enough” valid solutions without manual intervention, which experienced designers can then refine with their expertise to achieve a higher QoR, rather than wasting their effort in initial and time-consuming design iterations.
On the other hand, the current AMBEATion results are more directly comparable with those generated by other similar state-of-the-art AMS auto-placer tools developed by collaborative research projects (ALIGN, MAGICAL, etc). In this regard, our flow’s latest release includes all fundamental components that are present also in those tools. Additionally, AMBEATion takes into account more realistic sets of constraints (e.g. considering the impact of bulk connections in topology recognition, and allowing for pocket sharing among devices during placement, or including specific flow steps to handle the full-digital blocks in a complex AMS design). Moreover, the AMBEATion flow is tested on a real-world industrial technology node from ST and on several netlist from a real industrial project, rather than on simple netlists and open-source PDKs. For this exact reason (different benchmark circuits and technology libraries) a direct quantitative comparison with existing auto-placers is not possible, but in terms of supported features, we believe that AMBEATion is currently beyond the academic state-of-the-art.
Lastly, AMBEAtion’s modular software organization simplifies extensibility and quick replacement and/or comparison of algorithms for each individual flow step (both classic and AI/ML based). As we believe that this is a significant advantage of our flow with respect to the state of the art, the consortium is currently considering the option of open-sourcing the AMBEATion flow (after removing all IP-sensitive technological information).