Periodic Reporting for period 3 - PHOENICS (Photonic enabled Petascale in-memory computing with Femtojoule energy consumption)
Période du rapport: 2024-01-01 au 2025-06-30
Modern societies and economies increasingly depend on the massive generation of data resulting from the exponential growth of internet applications. Drastically enhanced computational performance is in particular needed for a plethora of
applications in artificial intelligence (AI) which necessitate unprecedented processing power, memory and communication bandwidth. This demand cannot be met by modern digital electronic technologies that are rapidly approaching their physical limits. The PHOENICS consortium will break through these barriers and lay the foundation for a disruptive neuromorphic compute platform based on hybrid photonic integrated circuits. By providing access to parallelized neuromorphic processing using wavelength division multiplexing, the PHOENICS consortium will harness exceptional scaling potential not available to
electronic systems and will deliver multiply-accumulate (MAC) performance at 3.2 PetaMAC/s at an energy cost of 50 FemtoJoule/MAC. Building on a hybrid architecture with substantial potential for future upscaling, the PHOENICS project aims at implementing a disruptive architecture which outperforms state-of-the-art electronic neuromorphic hardware. The consortium partners have shown the significant technological potential that a photonic approach can offer by establishing a new brain-inspired computing paradigm using phase-change-materials. By implementing scalable systems based on foundry
processing for creating bio-mimicking material platforms, the PHOENICS consortium will provide a new generation of photonic hardware accelerators for neuromorphic processing and develop a strong ecosystem for photonic computing.
applications in artificial intelligence (AI) which necessitate unprecedented processing power, memory and communication bandwidth. This demand cannot be met by modern digital electronic technologies that are rapidly approaching their physical limits. The PHOENICS consortium will break through these barriers and lay the foundation for a disruptive neuromorphic compute platform based on hybrid photonic integrated circuits. By providing access to parallelized neuromorphic processing using wavelength division multiplexing, the PHOENICS consortium will harness exceptional scaling potential not available to
electronic systems and will deliver multiply-accumulate (MAC) performance at 3.2 PetaMAC/s at an energy cost of 50 FemtoJoule/MAC. Building on a hybrid architecture with substantial potential for future upscaling, the PHOENICS project aims at implementing a disruptive architecture which outperforms state-of-the-art electronic neuromorphic hardware. The consortium partners have shown the significant technological potential that a photonic approach can offer by establishing a new brain-inspired computing paradigm using phase-change-materials. By implementing scalable systems based on foundry
processing for creating bio-mimicking material platforms, the PHOENICS consortium will provide a new generation of photonic hardware accelerators for neuromorphic processing and develop a strong ecosystem for photonic computing.
Over its full duration, the PHOENICS project advanced the vision of photonic in-memory computing by developing a comprehensive hardware platform capable of executing high-speed, low-energy matrix and convolution operations across multiple wavelengths. The work performed from project start to completion spans the coordinated efforts of all eight technical work packages, covering hybrid integration, source and driver technology, photonic tensor cores, demultiplexing and detection, analog convolution processing, system packaging, and benchmarking & exploitation.
Overall Technical Progress
Hybrid Integration and Input Modulation (WP2)
Development of stable and CMOS-compatible hybrid integration strategies, with thermal stability confirmed under temperature cycling.
Multi-Frequency Comb Driver Technology (WP3)
Delivery of packaged InP laser systems and microresonator-based comb generators for massively parallel WDM computing.
Photonic Matrix Multiplier Development (WP4)
Design and fabrication of crossbar photonic tensor cores up to 25×25 elements with mixed-mode readout and phase-change-material MAC units.
Demultiplexing and Detection (WP5)
Realization of high-performance demultiplexer and detector arrays for WDM parallel readout.
Analog Convolution Processing (WP6)
Demonstration of analog photonic convolution engines and long-term operational stability.
System Packaging and Assembly (WP7)
Development of 3D-printed inter-chip couplers, FPGA-driven control systems, modular system enclosure, and initial characterization of final chips.
Benchmarking, Dissemination, and Exploitation (WP8)
Extensive scientific dissemination, industrial engagement, policy outreach, public education, development of a photonic computing video game, and implementation of a structured IP and exploitation strategy.
Open Science and Data Management
Commitment to FAIR principles, open access publishing, dataset sharing, and long-term archiving.
Overall Impact
PHOENICS has positioned Europe at the forefront of neuromorphic photonic computing through technological advancements, scalable prototypes, validated analog computing operations, extensive dissemination, and strong exploitation planning.
Overall Technical Progress
Hybrid Integration and Input Modulation (WP2)
Development of stable and CMOS-compatible hybrid integration strategies, with thermal stability confirmed under temperature cycling.
Multi-Frequency Comb Driver Technology (WP3)
Delivery of packaged InP laser systems and microresonator-based comb generators for massively parallel WDM computing.
Photonic Matrix Multiplier Development (WP4)
Design and fabrication of crossbar photonic tensor cores up to 25×25 elements with mixed-mode readout and phase-change-material MAC units.
Demultiplexing and Detection (WP5)
Realization of high-performance demultiplexer and detector arrays for WDM parallel readout.
Analog Convolution Processing (WP6)
Demonstration of analog photonic convolution engines and long-term operational stability.
System Packaging and Assembly (WP7)
Development of 3D-printed inter-chip couplers, FPGA-driven control systems, modular system enclosure, and initial characterization of final chips.
Benchmarking, Dissemination, and Exploitation (WP8)
Extensive scientific dissemination, industrial engagement, policy outreach, public education, development of a photonic computing video game, and implementation of a structured IP and exploitation strategy.
Open Science and Data Management
Commitment to FAIR principles, open access publishing, dataset sharing, and long-term archiving.
Overall Impact
PHOENICS has positioned Europe at the forefront of neuromorphic photonic computing through technological advancements, scalable prototypes, validated analog computing operations, extensive dissemination, and strong exploitation planning.
Over its full duration, the PHOENICS project has achieved major breakthroughs in neuromorphic photonic computing, moving the field decisively beyond the existing state of the art. While photonic accelerators and integrated optical processors had previously demonstrated isolated functionalities, PHOENICS is among the first initiatives to develop a full-stack, heterogeneously integrated photonic in-memory computing platform capable of performing high-speed, energy-efficient matrix and convolution operations across multiple wavelengths.
Key advances include:
1. Heterogeneous Photonic–Electronic Integration at Unprecedented Scale
The project demonstrated robust hybrid integration of III–V active devices, CMOS-compatible silicon and silicon nitride photonics, and 3D-printed inter-chip couplers. The development of 3D polymer interfaces with low insertion losses, combined with thermally stable bonding of active and passive layers, significantly surpasses previous solutions limited by alignment tolerance and bandwidth constraints.
2. Multidimensional Photonic Tensor Cores with Integrated Weight Storage
PHOENICS designed and fabricated a 5×5 matrix multiplier PICs incorporating:
WDM-capable multiplexers with ultra-low crosstalk
Phase-change-material (PCM) multi-level attenuation banks for non-volatile, analog weight storage
Mixed-mode positive/negative multiplication schemes via balanced detection
These capabilities surpass previous demonstrations, which were restricted either to small matrix sizes, single-wavelength operation, or volatile weight encoding.
3. Advanced Optical Frequency Comb Sources for Parallel Computing
The consortium delivered packaged InP laser and microresonator-based comb modules that supply dense, stable wavelength grids required for massively parallel computing. This represents a substantial technological step over earlier bench-scale sources by offering architectural compatibility and packaging suitable for system assembly.
4. End-to-End Analog Convolution Processing
For the first time, PHOENICS validated analog photonic convolution operations within an integrated system architecture. Long-term stability studies confirm the feasibility of executing multi-stage signal transformations without digital conversion, positioning analog photonics as a competitive candidate for future edge-AI platforms.
5. Scalable Packaging and System-Level Integration
The creation of a modular system enclosure, an FPGA-driven electronic interface, and pre-integration of all final components constitutes one of the most comprehensive packaging efforts in photonic AI hardware. Although final full-chip integration awaits completion beyond the project’s timeframe, the system-level innovations establish a blueprint for industrial adoption.
Key advances include:
1. Heterogeneous Photonic–Electronic Integration at Unprecedented Scale
The project demonstrated robust hybrid integration of III–V active devices, CMOS-compatible silicon and silicon nitride photonics, and 3D-printed inter-chip couplers. The development of 3D polymer interfaces with low insertion losses, combined with thermally stable bonding of active and passive layers, significantly surpasses previous solutions limited by alignment tolerance and bandwidth constraints.
2. Multidimensional Photonic Tensor Cores with Integrated Weight Storage
PHOENICS designed and fabricated a 5×5 matrix multiplier PICs incorporating:
WDM-capable multiplexers with ultra-low crosstalk
Phase-change-material (PCM) multi-level attenuation banks for non-volatile, analog weight storage
Mixed-mode positive/negative multiplication schemes via balanced detection
These capabilities surpass previous demonstrations, which were restricted either to small matrix sizes, single-wavelength operation, or volatile weight encoding.
3. Advanced Optical Frequency Comb Sources for Parallel Computing
The consortium delivered packaged InP laser and microresonator-based comb modules that supply dense, stable wavelength grids required for massively parallel computing. This represents a substantial technological step over earlier bench-scale sources by offering architectural compatibility and packaging suitable for system assembly.
4. End-to-End Analog Convolution Processing
For the first time, PHOENICS validated analog photonic convolution operations within an integrated system architecture. Long-term stability studies confirm the feasibility of executing multi-stage signal transformations without digital conversion, positioning analog photonics as a competitive candidate for future edge-AI platforms.
5. Scalable Packaging and System-Level Integration
The creation of a modular system enclosure, an FPGA-driven electronic interface, and pre-integration of all final components constitutes one of the most comprehensive packaging efforts in photonic AI hardware. Although final full-chip integration awaits completion beyond the project’s timeframe, the system-level innovations establish a blueprint for industrial adoption.