Periodic Reporting for period 1 - Vitamin-V (Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services)
Période du rapport: 2023-01-01 au 2024-06-30
Vitamin-V aims to develop a complete RISC-V open-source software stack for cloud services with iso-performance to the cloud dominant x86 counterpart and a powerful virtual execution environment for software development, validation, verification, and test that considers the relevant RISC-V ISA extensions for cloud deployment.
Specifically, commercial cloud systems make use of hardware features that are currently unavailable in RISC-V virtual environments (not to mention the lack of specific RISC-V hardware). These features include the virtualization, cryptography and vectorization for which Vitamin-V will add support in three virtual environments: QEMU, gem5 and cloud-FPGA prototype platforms. Vitamin-V focuses and will provide support for EPI-based RISC-V designs for both the main CPUs and cloud-important accelerators (for memory compression). We will add the compiler (LLVM-based) and toolchain support for the ISA extensions. Moreover, novel approaches for the validation, verification, and test of software trustworthiness will be developed considering.
Vitamin-V will port and evaluate several cutting-edge VMMs and container suites (i.e. VOSySmonitor, KVM, QEMU, Docker, RustVMM, Kata containers), cloud management software (i.e. OpenStack, and Kubernetes) together with their software and libraries dependencies (e.g. JVM, Python); and AI (i.e Tensorflow) and BigData applications (Apache Spark). These software suites are representative of the three cloud setups that will be demonstrated: classical (OpenStack), modern (Kubernetes), and serverless (RustVMM, Kata, Kubernetes). The cloud setups will be benchmarked against relevant AI (i.e. Google Net, ResBet, VGG19), BigData (TPC-DS), and Serverless applications (FunctionBench, ServerlessBench). Vitamin-V aims to match the software performance of its x86 equivalent while contributing to RISC-V open-source virtual environments, software validation and cloud software suites.
In detail our objectives are:
Objective 1: Develop Vitamin RISC-V (VRISC-V), a complete virtual execution environment providing emulation, simulation, and FPGA prototyping of EPI RISC-V based systems to favor and support software development for future cloud architectures powered by EPI RISC-V cores.
Objective 2: Deliver a toolset to support software developers and allow development, validation, verification, and testing of the trustworthiness of software layers over RISC-V architectures.
Objective 3: Port relevant open-source cloud software distributions comprising classical, modern, and serverless cloud setups to RISC-V, making them ready for the VRISC-V virtual environments.
Objective 4: Demonstrate AI, Big-Data, and Serverless applications running on top of classic, modern, and serverless cloud environments.
Specifically, commercial cloud systems make use of hardware features that are currently unavailable in RISC-V virtual environments (not to mention the lack of specific RISC-V hardware). These features include the virtualization, cryptography and vectorization for which Vitamin-V will add support in three virtual environments: QEMU, gem5 and cloud-FPGA prototype platforms. Vitamin-V focuses and will provide support for EPI-based RISC-V designs for both the main CPUs and cloud-important accelerators (for memory compression). We will add the compiler (LLVM-based) and toolchain support for the ISA extensions. Moreover, novel approaches for the validation, verification, and test of software trustworthiness will be developed considering.
Vitamin-V will port and evaluate several cutting-edge VMMs and container suites (i.e. VOSySmonitor, KVM, QEMU, Docker, RustVMM, Kata containers), cloud management software (i.e. OpenStack, and Kubernetes) together with their software and libraries dependencies (e.g. JVM, Python); and AI (i.e Tensorflow) and BigData applications (Apache Spark). These software suites are representative of the three cloud setups that will be demonstrated: classical (OpenStack), modern (Kubernetes), and serverless (RustVMM, Kata, Kubernetes). The cloud setups will be benchmarked against relevant AI (i.e. Google Net, ResBet, VGG19), BigData (TPC-DS), and Serverless applications (FunctionBench, ServerlessBench). Vitamin-V aims to match the software performance of its x86 equivalent while contributing to RISC-V open-source virtual environments, software validation and cloud software suites.
In detail our objectives are:
Objective 1: Develop Vitamin RISC-V (VRISC-V), a complete virtual execution environment providing emulation, simulation, and FPGA prototyping of EPI RISC-V based systems to favor and support software development for future cloud architectures powered by EPI RISC-V cores.
Objective 2: Deliver a toolset to support software developers and allow development, validation, verification, and testing of the trustworthiness of software layers over RISC-V architectures.
Objective 3: Port relevant open-source cloud software distributions comprising classical, modern, and serverless cloud setups to RISC-V, making them ready for the VRISC-V virtual environments.
Objective 4: Demonstrate AI, Big-Data, and Serverless applications running on top of classic, modern, and serverless cloud environments.
Towards the aforementioned 4 specific objectives, the scientific work-packages (WP1, 2, 3, 4) focused on the following key actions, along the first 18 months of VITAMIN-V:
• WP1 (Hardware Interface and VRISC-V development): WP1 investigated the hardware performance monitoring (HPM) extensions of RISC-V which provide access to HPM-related CSR registers to address the need for software validation, verification, and testing in cloud environments by developing and utilizing hardware monitoring to assess the trustworthiness of software deployed on RISC-V. Thus, various event monitoring features on the gem5 simulator were implemented, all 15 Semidynamics’ Atrevido Core event counters were implemented, adhering to the RISC-V HPM specification, the communication interface between system software and hardware compression was specified, the baseline simulation of infrastructure for RISC-V in gem5 was set up, a full Ubuntu 22.04 RISC-V image within the VITAMIN-V simulation environment was created, RISC-V support to the QEMU software and evaluated extensions was added and tested.
• WP2 (Software Validation, Verification and Test (VVT)): WP2 assessed the support level of existing toolchains for common programming languages in cloud environments on the RISC-V architecture, and the functionality of the Rust upstream toolchain was verified. Also, we developed profiling capabilities tailored to the specificities of the three emulation platforms introduced in WP1. Besides, we have developed AI based VVT approaches using third-party simulators or other ISAs to benchmark the results against public data. We are in the process of evaluating the new approaches on top of WP1 platforms. In addition, a machine learning tool for static analysis of executable files, distinguishing between benign and malicious software has been developed and it is currently benchmarked. The AI-based VVT was presented at HiPEAC 2024 (January 2024).
• WP3 (Software Ports): WP3’s initial work started with the exploration of software requirements and dependencies, identifying such dependencies that will need porting to RISC-V to complete all software ports. Ports are -overall- halfway (as planned). Initial completed ports such as OpenStack have been demonstrated in the Mobile Wolrd Congress (February 2024) and the RISC-V summit (June 2024). Similarly, the Kubernetes port was showcased in the RISC-V Summit (June 2024).
• WP4 (Demonstration): First, we set up the CI/CD infrastructure that will be utilized in the next months. Then, we evaluated the different hardware platforms available for benchmarking and started the preparations to a successful evaluation for the next months.
All previous actions have been carried out in line with the technical and managerial provisions stated in the DoA of the project. All deliverables scheduled between M1 and M18 where submitted within the deadline. All the 4 milestones due in this time where achieved.
• WP1 (Hardware Interface and VRISC-V development): WP1 investigated the hardware performance monitoring (HPM) extensions of RISC-V which provide access to HPM-related CSR registers to address the need for software validation, verification, and testing in cloud environments by developing and utilizing hardware monitoring to assess the trustworthiness of software deployed on RISC-V. Thus, various event monitoring features on the gem5 simulator were implemented, all 15 Semidynamics’ Atrevido Core event counters were implemented, adhering to the RISC-V HPM specification, the communication interface between system software and hardware compression was specified, the baseline simulation of infrastructure for RISC-V in gem5 was set up, a full Ubuntu 22.04 RISC-V image within the VITAMIN-V simulation environment was created, RISC-V support to the QEMU software and evaluated extensions was added and tested.
• WP2 (Software Validation, Verification and Test (VVT)): WP2 assessed the support level of existing toolchains for common programming languages in cloud environments on the RISC-V architecture, and the functionality of the Rust upstream toolchain was verified. Also, we developed profiling capabilities tailored to the specificities of the three emulation platforms introduced in WP1. Besides, we have developed AI based VVT approaches using third-party simulators or other ISAs to benchmark the results against public data. We are in the process of evaluating the new approaches on top of WP1 platforms. In addition, a machine learning tool for static analysis of executable files, distinguishing between benign and malicious software has been developed and it is currently benchmarked. The AI-based VVT was presented at HiPEAC 2024 (January 2024).
• WP3 (Software Ports): WP3’s initial work started with the exploration of software requirements and dependencies, identifying such dependencies that will need porting to RISC-V to complete all software ports. Ports are -overall- halfway (as planned). Initial completed ports such as OpenStack have been demonstrated in the Mobile Wolrd Congress (February 2024) and the RISC-V summit (June 2024). Similarly, the Kubernetes port was showcased in the RISC-V Summit (June 2024).
• WP4 (Demonstration): First, we set up the CI/CD infrastructure that will be utilized in the next months. Then, we evaluated the different hardware platforms available for benchmarking and started the preparations to a successful evaluation for the next months.
All previous actions have been carried out in line with the technical and managerial provisions stated in the DoA of the project. All deliverables scheduled between M1 and M18 where submitted within the deadline. All the 4 milestones due in this time where achieved.
The progress beyond state-of-the-art includes:
1) Support for all necessary parts of the RISC-V ISA (i.e. GHKBV ISA extensions on top of the base G ISA) will be included in QEMU, gem5, and an FPGA deployment of the SEMIDYNAMICS Atrevido RISC-V RV64GCV core. This is a requirement to demonstrate and prototype cloud stacks deployment on realistic operational environments. QEMU and
gem5 results will be open source. A cloud container with SEMIDYNAMICS’s RISC-V on FPGA will be publicly released.
2) LLVM compiler and related debugging tools and support for high-level programming languages (i.e. Golang for Kubernetes, Rust for Rust-VMM, Java Virtual Machine and Python3 for Apache Spark and TensorFlow) including the complete RISC-V ISA. Full support for the latest specification of the RISC-V HPM in standard libraries (i.e. Perf and PAPI) through the VRISC-V. Add-on tools for software validation, verification and test. All software will be released as open source.
3) Fundamental cloud software that is currently partially ported on RISC-V and therefore only partially validated will be fully ported, executed and validated in realistic operational setups thanks to the VRISC-V virtual execution framework. Technologies include VOSySMonitoRV, KVM, QEMU, RustVMM, Docker, Kata Containers, OpenStack, Kubernetes, Tensorflow and Apache Spark. All software but VOSySMonitoRV will be open source. VOSySMonitoRV will be released with a commercial license.
1) Support for all necessary parts of the RISC-V ISA (i.e. GHKBV ISA extensions on top of the base G ISA) will be included in QEMU, gem5, and an FPGA deployment of the SEMIDYNAMICS Atrevido RISC-V RV64GCV core. This is a requirement to demonstrate and prototype cloud stacks deployment on realistic operational environments. QEMU and
gem5 results will be open source. A cloud container with SEMIDYNAMICS’s RISC-V on FPGA will be publicly released.
2) LLVM compiler and related debugging tools and support for high-level programming languages (i.e. Golang for Kubernetes, Rust for Rust-VMM, Java Virtual Machine and Python3 for Apache Spark and TensorFlow) including the complete RISC-V ISA. Full support for the latest specification of the RISC-V HPM in standard libraries (i.e. Perf and PAPI) through the VRISC-V. Add-on tools for software validation, verification and test. All software will be released as open source.
3) Fundamental cloud software that is currently partially ported on RISC-V and therefore only partially validated will be fully ported, executed and validated in realistic operational setups thanks to the VRISC-V virtual execution framework. Technologies include VOSySMonitoRV, KVM, QEMU, RustVMM, Docker, Kata Containers, OpenStack, Kubernetes, Tensorflow and Apache Spark. All software but VOSySMonitoRV will be open source. VOSySMonitoRV will be released with a commercial license.