Reconfigurable Heterogeneous Highly Parallel Processing Platform for safe and secure AI

Información del proyecto

REBECCA

Identificador del acuerdo de subvención: 101097224

DOI

10.3030/101097224

Fecha de la firma de la CE 1 Diciembre 2022

Fecha de inicio 1 Febrero 2023

Fecha de finalización 31 Enero 2027

Financiado con arreglo a

• Digital, Industry and Space

Coste total

€ 8 498 328,59

Aportación de la UE

€ 2 744 319,72

Coordinado por

POLYTECHNEIO KRITIS
Greece

CORDIS proporciona enlaces a los documentos públicos y las publicaciones de los proyectos de los programas marco HORIZONTE.

Los enlaces a los documentos y las publicaciones de los proyectos del Séptimo Programa Marco, así como los enlaces a algunos tipos de resultados específicos, como conjuntos de datos y «software», se obtienen dinámicamente de OpenAIRE .

Resultado final

Documents, reports (7)

Alpha version (MVP) of the integrated software stack

The first (alpha) version will provide necessary interfaces and early implementations of components, with possible components missing or having reduced features.

Beta version of the DSE, safety and security tools

The second version of the tools and methods will include all the final planned features to explore the design space and analyse safety and security of the AI algorithms on the REBECCA platform. It will enable the in-depth analysis of the expected project outcomes using the designs from WP2 and the use cases from WP5.

Alpha version (MVP) of the DSE, safety and security tools

The first version of the tools will provide only preliminary capabilities, and enable initial feedback from the WP2 partners, as appropriate.

Beta version of the integrated software stack

The second (beta) version of the integrated software stack with all components and capable of supporting most use cases in the project.

Report 1 on Communication and Dissemination

Report on the dissemination and communication activities. Update of the dissemination plan and reporting the results of the second reporting period.

Plan for Communication, Dissemination and Exploitation channels

The initial plan for Communication Dissemination and exploitation activities templates the Project website and communication channels social media and others

Evaluation framework and Criteria

List of KPIs and evaluation criteria

Data Management Plan (2)

Data Management Plan (M1-M6)

Description of the project DMP open source and open data along with procedures to be used at use cases

Data Management Plan (M7-M18)

Description of the project DMP, open source and open data, along with procedures to be used at use cases.

Publicaciones

Peer reviewed articles (14)

NN2FPGA: Optimizing CNN Inference on FPGAs With Binary Integer Programming

Autores: Roberto Bosio, Filippo Minnella, Teodoro Urso, Mario R. Casu, Luciano Lavagno, Mihai T. Lazarescu, Paolo Pasini
Publicado en: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Edición 44, 2024, ISSN 0278-0070
Editor: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TCAD.2024.3507570

IEEE Transactions on Computers

Autores: Papadimitriou, George; Gizopoulos, Dimitris
Publicado en: IEEE Transactions on Computers, 2023, ISSN 0018-9340
Editor: Institute of Electrical and Electronics Engineers
DOI: 10.1109/TC.2023.3285094

Model-driven gap analysis for the fulfillment of quality standards in software development processes

Autores: Giovanni Giachetti; José Luis de la Vara; Beatriz Marín
Publicado en: Software Quality Journal, Edición 32, 2023, ISSN 1573-1367
Editor: Springer
DOI: 10.21203/RS.3.RS-2329678/V1

Assessment of the quality of the text of safety standards with industrial semantic technologies

Autores: Jose Luis de la Vara, Hector Bahamonde, Clara Ayora
Publicado en: Computer Standards & Interfaces, Edición 88, 2023, ISSN 0920-5489
Editor: Elsevier BV
DOI: 10.1016/J.CSI.2023.103803

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Autores: Ottati, Fabrizio; Gao, Chang; Chen, Qinyu; Brignone, Giovanni; Casu, Mario R.; Eshraghian, Jason K.; Lavagno, Luciano
Publicado en: IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2023, ISSN 2156-3357
Editor: IEEE
DOI: 10.48550/arxiv.2306.15749

Software Quality Journal

Autores: Giovanni Giachetti; José Luis de la Vara; Beatriz Marín
Publicado en: Crossref, 2023, ISSN 0963-9314
Editor: Kluwer Academic Publishers
DOI: 10.1007/s11219-023-09649-x

An Energy-Efficient GeMM-Based Convolution Accelerator With On-the-Fly im2col

Autores: Jordi Fornt, Pau Fontova-Musté, Martí Caro, Jaume Abella, Francesc Moll, Josep Altet, Christoph Studer
Publicado en: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Edición 31, 2023, ISSN 1063-8210
Editor: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/TVLSI.2023.3286122

Transactions on Architecture and Code Optimization

Autores: Agiakatsikas, Dimitris; Papadimitriou, George; Karakostas, Vasileios; Gizopoulos, Dimitris; Psarakis, Mihalis; Bélanger-Champagne, Camille; Blackmore, Ewart
Publicado en: 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023, ISSN 1544-3566
Editor: Association for Computing Machinary, Inc.
DOI: 10.1145/3613424.3614304

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Autores: Ottati, Fabrizio; Gao, Chang; Chen, Qinyu; Brignone, Giovanni; Casu, Mario R; Eshraghian, Jason K; Lavagno, Luciano
Publicado en: Crossref, 2023, ISSN 2156-3357
Editor: IEEE Circuits and Systems Society
DOI: 10.5167/uzh-254211

Journal of Signal Processing Systems

Autores: Martí Caro; Jaume Abella
Publicado en: instname:Universitat Politècnica de Catalunya (UPC), 2024, ISSN 1939-8018
Editor: Springer
DOI: 10.1007/s11265-024-01917-8

Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures

Autores: Gizopoulos, Dimitris; Papadimitriou, George; Chatzopoulos, Odysseas
Publicado en: 2023 IEEE International Test Conference (ITC), 2023, ISSN 2378-2250
Editor: IEEE
DOI: 10.1109/ITC51656.2023.00056

A Scalable All-Digital Near-Memory Computing Architecture for Edge AIoT Applications

Autores: Masoud Nouripayam, Arturo Prieto, Joachim Rodrigues
Publicado en: IEEE Access, Edición 13, 2025, ISSN 2169-3536
Editor: Institute of Electrical and Electronics Engineers (IEEE)
DOI: 10.1109/ACCESS.2025.3582013

SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs

Autores: Chatzopoulos, Odysseas; Trakosa, Maria; Papadimitriou, George; Wong, Wing Shek; Gizopoulos, Dimitris
Publicado en: 2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2024, ISSN 2766-0486
Editor: IEEE
DOI: 10.5281/ZENODO.12552304

Silent Data Corruptions: Microarchitectural Perspectives

Autores: Papadimitriou, George; Gizopoulos, Dimitris
Publicado en: -, 2023, ISSN 0000-0000
Editor: IEEE
DOI: 10.1109/TC.2023.3285094

Conference proceedings (12)

A DSP shared is a DSP earned: HLS Task-Level Multi-Pumping for High-Performance Low-Resource Designs

Autores: Giovanni Brignone, Mihai T. Lazarescu, Luciano Lavagno
Publicado en: 41 IEEE International Conference on Computer Design, 2023, ISSN 2576-6996
Editor: IEEE
DOI: 10.48550/arXiv.2310.00330

Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity

Autores: Papadimitriou, George; Gizopoulos, Dimitris; Dixit, Harish; Sankar, Sriram
Publicado en: 2023 IEEE 29th International Symposium on On-Line Testing and Robust System Design (IOLTS), 2023
Editor: IEEE
DOI: 10.1109/IOLTS59296.2023.10224870

An Early-Stage Workflow Proposal for the Generation of Safe and Dependable AI Classifiers

Autores: Hans Dermot Doran / Suzana Veljanovska
Publicado en: 2024
Editor: 43rd International Conference on Computer Safety, Reliability and Security (SafeComp2024)
DOI: 10.48550/ARXIV.2410.01850

Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation

Autores: Karystinos, Nikos; Chatzopoulos, Odysseas; Fragkoulis, George-Marios; Papadimitriou, George; Gizopoulos, Dimitris; Gurumurthi, Sudhanva
Publicado en: 2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), 2024
Editor: ACM/IEEE International Symposium on Computer Architecture (ISCA)
DOI: 10.5281/ZENODO.12553098

Assurance of Software-Intensive Medical Devices: What About Mental Harm?

Autores: Jose Luis de La Vara, Barbara Gallina, Antonio Fernández-Caballero, Jose Pascual Molina, Arturo S. García, Clara Ayora
Publicado en: 2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S), 2023
Editor: IEEE
DOI: 10.1109/DSN-S58398.2023.00045

Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5

Autores: Chatzopoulos, Odysseas; Papadimitriou, George; Karakostas, Vasileios; Gizopoulos, Dimitris
Publicado en: 2023
Editor: IEEE
DOI: 10.5281/zenodo.8433198

Reliability of CNN Execution - A Novel Application of the Single Protected Channel Pattern

Autores: Hans Dermot Doran, Suzana Veljanovska
Publicado en: 2024 IEEE 29th International Conference on Emerging Technologies and Factory Automation (ETFA), 2024
Editor: IEEE
DOI: 10.1109/ETFA61755.2024.10710935

Hybrid Convolutional Neural Networks with Reliability Guarantee

Autores: Hans Dermot Doran, Suzana Veljanovska
Publicado en: 2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W), 2024, ISSN 2325-6664
Editor: IEEE
DOI: 10.1109/DSN-W60302.2024.00023

Silent Data Errors: Sources, Detection, and Modeling

Autores: Singh, Adit; Chakravarty, Sreejit; Papadimitriou, George; Gizopoulos, Dimitris
Publicado en: 2023
Editor: IEEE
DOI: 10.1109/VTS56346.2023.10139970

Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension

Autores: George-Marios Fragkoulis / Nikos Karystinos / George Papadimitriou / Dimitris Gizopoulos
Publicado en: 2024
Editor: IEEE/ACM MICRO 2024
DOI: 10.48550/ARXIV.2411.12444

Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures

Autores: Chatzopoulos, Odysseas; Papadimitriou, George; Karakostas, Vasileios; Gizopoulos, Dimitris
Publicado en: 2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2024
Editor: IEEE
DOI: 10.1109/HPCA57654.2024.00047

Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity

Autores: Papadimitriou, George; Gizopoulos, Dimitris; Dixit, Harish; Sankar, Sriram
Publicado en: 2023
Editor: IEEE
DOI: 10.1109/IOLTS59296.2023.10224870

Book chapters (1)

Generic Architecture for Multisource Physiological Signal Acquisition, Processing and Classification Based on Microservices

Autores: Roberto Sánchez-Reolid, Daniel Sánchez-Reolid, Clara Ayora, José Luis de la Vara, António Pereira, Antonio Fernández-Caballero
Publicado en: Lecture Notes in Networks and Systems, Distributed Computing and Artificial Intelligence, 20th International Conference, 2023
Editor: Springer Nature Switzerland
DOI: 10.1007/978-3-031-38333-5_13