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MultIwavelength LAser for fast DiagnOstic in biomedical and manufacturing applications

Periodic Reporting for period 1 - MILADO (MultIwavelength LAser for fast DiagnOstic in biomedical and manufacturing applications)

Reporting period: 2024-06-01 to 2025-11-30

MILADO will provide a robust and universal technology platform for low-cost and large volume fabrication of mid-infrared (MIR) lasers enabling novel sensors in medicine and production. Key innovation is the technology upscale of the epitaxy of Quantum-Cascade-Lasers (QCLs) on large area substrates and the development of concepts for direct III-V epitaxy on silicon. Merging III-V and Si-photonics by integrating QCLs and Si-based MIR photonics using CMOS-based technology well established but very costly III/V-technology-based manufacturing of QCL light sources for spectroscopic applications will be replaced by a cost-effective and scalable manufacturing technology on CEA’s CMOS Pilot Line bringing MIR technology out of its niche. Another building block of MILADO towards a general platform that can be extended for further integration of sensors and actuators in MEMS technology are MIR-PICs made from Ge/SiGe-structures for the definition of waveguides, combiners and any other passive devices required to handle the optical connection of QCLs. MILADO’s technology will open up new markets by enabling novel sensors for personal medical diagnostics or edge sensors in chemical production. The versatility of the approach will be demonstrated in use cases covering process control and medical diagnostics reaching from the hospital to the patient covering waste anaesthetic gas detection, histopathology to biomarker monitoring. MILADO will address the following objectives:
1.) Large scale III-V epitaxy for low-cost manufacturing of QCLs
2.) Towards a cheap volume fabrication of a universal MIR PIC platform
3.) Prototyping novel sensors for personal medical diagnostics or edge-sensors in chemical production opening new markets
4.) Demonstrating process control and medical diagnostics from mid-infrared chemical imaging histopathology to non-invasive continuous glucose monitoring
5.) Accelerate the analysis time (x100) in infrared spectral histopathology
Extensive work has been undertaken so far to reach objectives 1 & 2 with very good progress. The upscale of III-V QCL-epitaxy on 100mm wafers has been achieved by reaching MS2 and MS4 with corresponding deliveries, i.e. D3.1 – “Report on optimized QC heterostructure designs for both wavelength ranges”, D3.2 – “Sixteen 100 mm QCL wafers for operation in the 8 – 10 μm band for Si integration” and D3.3 – “Sixteen 100 mm QCL wafers for operation in the 5.5 – 6.5 μm band for Si integration”. These wafers have been wafer-bonded with very high yield and are currently under processing. MS3 – “Design of QCL laser devices and PICs” has been achieved and D4.1 – “Report on QCL & PIC design” submitted. For the other approach for direct epitaxy on silicon, the work is also on track and the process flow for nanopatterning of silicon wafers has been established and a first patch of nanostructured 8” Si wafers for tests of direct growth on silicon was delivered (D8.1). All work related to the use case demonstrations is on track, too. The deliverables D6.1-D6.4 related to WP 6 – “Use Case demo specification” have been submitted in due time. Deliverables D1.1 – “Project Quality Plan”, D1.2 – “Data Management Plan”, D1.3 – “Progress Report”, D1.4 –“ Riks Assessment Plan”, D9.1 – “Plan for dissemination and exploitation incl. communication activities” and D9.2 – “Updated plan and report on dissemination and exploitation incl. communication activities and intermediate report on standardization” were submitted to the European commission.
The two main results of the project, so far, is i) the successful wafer scale up to 100mm of the QCL epitaxy and the wafer bonding to silicon with high yield, and ii) the process development for nanostructuring of silicon wafers having large ridge width and thick thermal oxide layers. Whereas the first is paves the way for future cost reduction in QCL manufacturing using CMOS processing, the second is of more general use whenever aspect ratio trapping is employed.
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